c_rand.v

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// C runtime library random number generator
//
// uses 32 logic cells for DFF/ADD and 8 DSP blocks for the
// 32x18=>32 multiply

module c_rand (clk,rst,reseed,seed_val,out);
input clk,rst,reseed;
input [31:0] seed_val;
output [15:0] out;
wire [15:0] out;

reg [31:0] state;

always @(posedge clk or posedge rst) begin
	if (rst) state <= 0;
	else begin
		if (reseed) state <= seed_val;
		else begin
			state <= state * 32'h343fd + 32'h269EC3;
		end
	end
end

assign out = (state >> 16) & 16'h7fff;

endmodule