run.do

內含fulladder結構檔,電路檔,測試檔(testbench)以及執行檔(.do)

quit -sim
cd D:/Verilog_VHDL/CH02/VHDL/Full_Adder
--do run.do

vlib work
vmap work work

vcom pkg_Full_Adder.vhd
vcom Full_Adder.vhd

vcom tb_Full_Adder.vhd
vsim tb_Full_Adder

--add wave *
do wave_Full_Adder.do

run -all