serial.fit.rpt

串口通讯 verilog CPLD EPM1270 源代码

+------------------------------------+------------------------------+


+----------------------------------------------------------------------------+
; LAB Signals Sourced                                                        ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced  (Average = 7.23) ; Number of LABs  (Total = 26) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 2                            ;
; 2                                           ; 3                            ;
; 3                                           ; 3                            ;
; 4                                           ; 1                            ;
; 5                                           ; 0                            ;
; 6                                           ; 0                            ;
; 7                                           ; 1                            ;
; 8                                           ; 1                            ;
; 9                                           ; 6                            ;
; 10                                          ; 7                            ;
; 11                                          ; 1                            ;
; 12                                          ; 0                            ;
; 13                                          ; 0                            ;
; 14                                          ; 0                            ;
; 15                                          ; 0                            ;
; 16                                          ; 0                            ;
; 17                                          ; 1                            ;
+---------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                        ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out  (Average = 4.42) ; Number of LABs  (Total = 26) ;
+-------------------------------------------------+------------------------------+
; 0                                               ; 0                            ;
; 1                                               ; 2                            ;
; 2                                               ; 8                            ;
; 3                                               ; 2                            ;
; 4                                               ; 6                            ;
; 5                                               ; 1                            ;
; 6                                               ; 1                            ;
; 7                                               ; 2                            ;
; 8                                               ; 0                            ;
; 9                                               ; 0                            ;
; 10                                              ; 3                            ;
; 11                                              ; 0                            ;
; 12                                              ; 1                            ;
+-------------------------------------------------+------------------------------+


+----------------------------------------------------------------------------+
; LAB Distinct Inputs                                                        ;
+---------------------------------------------+------------------------------+
; Number of Distinct Inputs  (Average = 8.04) ; Number of LABs  (Total = 26) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 0                            ;
; 2                                           ; 0                            ;
; 3                                           ; 5                            ;
; 4                                           ; 2                            ;
; 5                                           ; 1                            ;
; 6                                           ; 2                            ;
; 7                                           ; 3                            ;
; 8                                           ; 4                            ;
; 9                                           ; 1                            ;
; 10                                          ; 1                            ;
; 11                                          ; 0                            ;
; 12                                          ; 1                            ;
; 13                                          ; 3                            ;
; 14                                          ; 2                            ;
; 15                                          ; 0                            ;
; 16                                          ; 0                            ;
; 17                                          ; 0                            ;
; 18                                          ; 1                            ;
+---------------------------------------------+------------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Sat Feb 18 13:25:18 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off serial -c serial
Info: Selected device EPM1270T144C5 for design "serial"
Info: Fitter is performing a Standard Fit compilation using maximum Fitter effort to optimize design performance
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. 
    Info: Device EPM570T144C5 is compatible
    Info: Device EPM570T144I5 is compatible
    Info: Device EPM1270T144I5 is compatible
    Info: Device EPM1270T144C5ES is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info: Assuming a global fmax requirement of 1000 MHz
    Info: Assuming a global tsu requirement of 2.0 ns
    Info: Assuming a global tco requirement of 1.0 ns
    Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock
Info: Pin "clk" drives global clock, but is not placed in a dedicated clock pin position
Info: Automatically promoted some destinations of signal "clkbaud8x" to use Global clock
    Info: Destination "clkbaud8x" may be non-global or may not use global clock
Info: Automatically promoted some destinations of signal "rst" to use Global clock
    Info: Destination "clkbaud8x" may be non-global or may not use global clock
    Info: Destination "key_entry1" may be non-global or may not use global clock
    Info: Destination "div_reg[6]~405" may be non-global or may not use global clock
    Info: Destination "cnt_delay[12]~684" may be non-global or may not use global clock
    Info: Destination "start_delaycnt" may be non-global or may not use global clock
    Info: Destination "cnt_delay[12]~685" may be non-global or may not use global clock
Info: Pin "rst" drives global clock, but is not placed in a dedicated clock pin position
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Estimated most critical path is register to pin delay of 9.659 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X13_Y10; Fanout = 12; REG Node = 'rxd_buf[6]'
    Info: 2: + IC(1.236 ns) + CELL(0.200 ns) = 1.436 ns; Loc. = LAB_X13_Y10; Fanout = 3; COMB Node = 'reduce_or~3072'
    Info: 3: + IC(0.519 ns) + CELL(0.740 ns) = 2.695 ns; Loc. = LAB_X13_Y10; Fanout = 5; COMB Node = 'reduce_or~3073'
    Info: 4: + IC(0.799 ns) + CELL(0.914 ns) = 4.408 ns; Loc. = LAB_X14_Y10; Fanout = 2; COMB Node = 'reduce_or~3094'
    Info: 5: + IC(1.842 ns) + CELL(0.511 ns) = 6.761 ns; Loc. = LAB_X16_Y10; Fanout = 1; COMB Node = 'reduce_or~3100'
    Info: 6: + IC(0.576 ns) + CELL(2.322 ns) = 9.659 ns; Loc. = PIN_108; Fanout = 0; PIN Node = 'seg_data[6]'
    Info: Total cell delay = 4.687 ns ( 48.52 % )
    Info: Total interconnect delay = 4.972 ns ( 51.48 % )
Info: Fitter placement operations ending: elapsed time is 00:00:03
Info: Fitter routing operations beginning
Info: Average interconnect usage is 2% of the available device resources. Peak interconnect usage is 3%.
Info: Fitter routing operations ending: elapsed time is 00:00:01
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
    Info: Processing ended: Sat Feb 18 13:25:28 2006
    Info: Elapsed time: 00:00:11