mlt.fit.eqn

乘法器 verilog CPLD EPM1270 源代码

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--A1L52 is reduce_or~35 at LC_X12_Y3_N8
--operation mode is normal

A1L52 = b[1] & (a[1] # a[0]) # !b[1] & b[0] & a[1];


--A1L62 is reduce_or~36 at LC_X12_Y3_N0
--operation mode is normal

A1L62 = b[1] & (!a[1] & a[0]) # !b[1] & b[0] & (a[1] # a[0]);


--A1L72 is reduce_or~37 at LC_X13_Y4_N0
--operation mode is normal

A1L72 = b[0] & (a[0]) # !b[0] & a[1] & b[1] & !a[0];


--A1L82 is reduce_or~38 at LC_X13_Y4_N8
--operation mode is normal

A1L82 = b[0] & a[0] & (a[1] $ !b[1]) # !b[0] & a[1] & b[1] & !a[0];


--A1L92 is reduce_or~39 at LC_X15_Y3_N0
--operation mode is normal

A1L92 = a[0] & !a[1] & b[1] & !b[0] # !a[0] & a[1] & !b[1] & b[0];


--A1L03 is reduce_or~40 at LC_X16_Y2_N6
--operation mode is normal

A1L03 = a[1] & b[1] & (a[0] $ b[0]);


--A1L13 is reduce_or~41 at LC_X15_Y3_N3
--operation mode is normal

A1L13 = a[0] & !a[1] & !b[1] & b[0] # !a[0] & a[1] & b[1] & !b[0];


--b[1] is b[1] at PIN_67
--operation mode is input

b[1] = INPUT();


--a[1] is a[1] at PIN_69
--operation mode is input

a[1] = INPUT();


--b[0] is b[0] at PIN_68
--operation mode is input

b[0] = INPUT();


--a[0] is a[0] at PIN_71
--operation mode is input

a[0] = INPUT();


--c[0] is c[0] at PIN_120
--operation mode is output

c[0] = OUTPUT(VCC);


--c[1] is c[1] at PIN_119
--operation mode is output

c[1] = OUTPUT(!A1L52);


--c[2] is c[2] at PIN_117
--operation mode is output

c[2] = OUTPUT(A1L62);


--c[3] is c[3] at PIN_114
--operation mode is output

c[3] = OUTPUT(A1L72);


--c[4] is c[4] at PIN_113
--operation mode is output

c[4] = OUTPUT(A1L82);


--c[5] is c[5] at PIN_111
--operation mode is output

c[5] = OUTPUT(A1L92);


--c[6] is c[6] at PIN_108
--operation mode is output

c[6] = OUTPUT(A1L03);


--c[7] is c[7] at PIN_109
--operation mode is output

c[7] = OUTPUT(A1L13);


--en[0] is en[0] at PIN_134
--operation mode is output

en[0] = OUTPUT(GND);


--en[1] is en[1] at PIN_133
--operation mode is output

en[1] = OUTPUT(VCC);


--en[2] is en[2] at PIN_124
--operation mode is output

en[2] = OUTPUT(VCC);


--en[3] is en[3] at PIN_123
--operation mode is output

en[3] = OUTPUT(VCC);


--en[4] is en[4] at PIN_121
--operation mode is output

en[4] = OUTPUT(VCC);


--en[5] is en[5] at PIN_125
--operation mode is output

en[5] = OUTPUT(VCC);


--en[6] is en[6] at PIN_132
--operation mode is output

en[6] = OUTPUT(VCC);


--en[7] is en[7] at PIN_131
--operation mode is output

en[7] = OUTPUT(VCC);