decoder.map.qmsg

可以对输入时钟任意分频(整数或小数),带Quartus II 完整项目文件.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version " "Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 12 21:53:48 2006 " "Info: Processing started: Fri May 12 21:53:48 2006" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off decoder -c decoder " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off decoder -c decoder" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "decoder.bdf 1 1 " "Info: Found 1 design units and 1 entities in source file decoder.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 decoder " "Info: Found entity 1: decoder" {  } { { "F:/MovementControl/FPGA/new/decoder.bdf" "decoder" "" { Schematic "F:/MovementControl/FPGA/new/decoder.bdf" { } } }  } 0}  } {  } 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/MovementControl/FPGA/new/decoder.v " "Warning: Can't analyze file -- file F:/MovementControl/FPGA/new/decoder.v is missing" {  } {  } 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/MovementControl/FPGA/new/choose.v " "Warning: Can't analyze file -- file F:/MovementControl/FPGA/new/choose.v is missing" {  } {  } 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/MovementControl/FPGA/new/def.v " "Warning: Can't analyze file -- file F:/MovementControl/FPGA/new/def.v is missing" {  } {  } 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "F:/MovementControl/FPGA/new/test.v " "Warning: Can't analyze file -- file F:/MovementControl/FPGA/new/test.v is missing" {  } {  } 0}
{ "Warning" "WGDFX_INPUTC_OUTPUTC_NOT_SUPPORTED" "clk " "Warning: INPUTC, OUTPUTC and BIDIRC pins not supported for pin clk" {  } { { "F:/MovementControl/FPGA/new/decoder.bdf" "" "" { Schematic "F:/MovementControl/FPGA/new/decoder.bdf" { { 168 928 1096 184 "clk" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "CLR_C 8'b00000000 " "Warning: Can't find a definition for parameter CLR_C -- assuming 8'b00000000 was intended to be a quoted string" {  } { { "F:/MovementControl/FPGA/new/decoder.bdf" "" "" { Schematic "F:/MovementControl/FPGA/new/decoder.bdf" { { 184 1696 1840 312 "inst" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "INC_C 8'b00000001 " "Warning: Can't find a definition for parameter INC_C -- assuming 8'b00000001 was intended to be a quoted string" {  } { { "F:/MovementControl/FPGA/new/decoder.bdf" "" "" { Schematic "F:/MovementControl/FPGA/new/decoder.bdf" { { 184 1696 1840 312 "inst" "" } } } }  } 0}
{ "Info" "ISGN_SEARCH_FILE" "fenpin.v 1 1 " "Info: Using design file fenpin.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 fenpin " "Info: Found entity 1: fenpin" {  } { { "F:/MovementControl/FPGA/new/fenpin.v" "fenpin" "" { Text "F:/MovementControl/FPGA/new/fenpin.v" 16 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "decode.v 1 1 " "Info: Using design file decode.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 decode " "Info: Found entity 1: decode" {  } { { "F:/MovementControl/FPGA/new/decode.v" "decode" "" { Text "F:/MovementControl/FPGA/new/decode.v" 18 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "switch.v 1 1 " "Info: Using design file switch.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 switch " "Info: Found entity 1: switch" {  } { { "F:/MovementControl/FPGA/new/switch.v" "switch" "" { Text "F:/MovementControl/FPGA/new/switch.v" 16 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "fenpin:inst\|count\[0\]~0 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: fenpin:inst\|count\[0\]~0" {  } { { "F:/MovementControl/FPGA/new/fenpin.v" "" "count\[0\]~0" { Text "F:/MovementControl/FPGA/new/fenpin.v" 41 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "c:/quartus/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "c:/quartus/libraries/megafunctions/lpm_counter.tdf" 221 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/alt_counter_stratix.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_stratix " "Info: Found entity 1: alt_counter_stratix" {  } { { "c:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" "alt_counter_stratix" "" { Text "c:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" 282 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "84 " "Info: Implemented 84 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "11 " "Info: Implemented 11 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "1 " "Info: Implemented 1 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "72 " "Info: Implemented 72 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 7 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri May 12 21:53:51 2006 " "Info: Processing ended: Fri May 12 21:53:51 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0}  } {  } 0}