spi93c46.map.rpt

介绍了如何用vhdl语言实现处理器的spi接口

+----------------------------------+-----------------+------------------------------------+----------------------------------+


+---------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                   ;
+---------------------------------------------+-----------------+
; Resource                                    ; Usage           ;
+---------------------------------------------+-----------------+
; Estimated Total logic elements              ; 96              ;
; Total combinational functions               ; 72              ;
; Logic element usage by number of LUT inputs ;                 ;
;     -- 4 input functions                    ; 24              ;
;     -- 3 input functions                    ; 14              ;
;     -- <=2 input functions                  ; 34              ;
;         -- Combinational cells for routing  ; 0               ;
; Logic elements by mode                      ;                 ;
;     -- normal mode                          ; 41              ;
;     -- arithmetic mode                      ; 31              ;
; Total registers                             ; 96              ;
; I/O pins                                    ; 15              ;
; Maximum fan-out node                        ; clk:inst3|f500k ;
; Maximum fan-out                             ; 65              ;
; Total fan-out                               ; 408             ;
; Average fan-out                             ; 2.23            ;
+---------------------------------------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                    ;
+----------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name    ;
+----------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------+
; |Block1                    ; 72 (0)            ; 96 (0)       ; 0           ; 0    ; 0            ; 0       ; 0         ; 15   ; 0            ; |Block1                ;
;    |clk:inst3|             ; 46 (46)           ; 33 (33)      ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|clk:inst3      ;
;    |spi93c46:inst1|        ; 26 (26)           ; 63 (63)      ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; |Block1|spi93c46:inst1 ;
+----------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


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; State Machine - |Block1|spi93c46:inst1|current_state                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+-----------------------+----------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+-----------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+---------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+----------------------+--------------------+