f50k.fit.eqn

VHDL产生时钟50分频程序

A1L953 = m[0] & b;

--A1L863 is temp~1130 at LC1_B5
--operation mode is normal

A1L863 = m[0] & b;


--A1L063 is temp~1110 at LC6_B7
--operation mode is normal

A1L063 = !b & !temp[6];

--A1L963 is temp~1131 at LC6_B7
--operation mode is normal

A1L963 = !b & !temp[6];


--m[1] is m[1] at LC6_B6
--operation mode is normal

m[1]_lut_out = reg;
m[1] = DFFEA(m[1]_lut_out, clk1, , , contl, , );

--A1L92Q is m[1]~13 at LC6_B6
--operation mode is normal

A1L92Q = m[1];


--A1L163 is temp~1111 at LC7_B7
--operation mode is normal

A1L163 = !m[1] & b;

--A1L073 is temp~1132 at LC7_B7
--operation mode is normal

A1L073 = !m[1] & b;


--A1L392 is process6~3 at LC8_B6
--operation mode is normal

A1L392 = !m[0] & b & m[1];

--A1L492 is process6~88 at LC8_B6
--operation mode is normal

A1L492 = !m[0] & b & m[1];


--A1L263 is temp~1112 at LC8_B7
--operation mode is normal

A1L263 = !b & temp[7];

--A1L173 is temp~1133 at LC8_B7
--operation mode is normal

A1L173 = !b & temp[7];


--A1L292 is process6~0 at LC3_B6
--operation mode is normal

A1L292 = m[0] & b & m[1];

--A1L592 is process6~89 at LC3_B6
--operation mode is normal

A1L592 = m[0] & b & m[1];


--A1L363 is temp~1113 at LC1_B6
--operation mode is normal

A1L363 = b & (m[1] & !temp[4] & m[0] # !m[1] & (!m[0])) # !b & !temp[4];

--A1L273 is temp~1134 at LC1_B6
--operation mode is normal

A1L273 = b & (m[1] & !temp[4] & m[0] # !m[1] & (!m[0])) # !b & !temp[4];


--A1L463 is temp~1114 at LC2_B5
--operation mode is normal

A1L463 = !m[0] & b # !temp[3];

--A1L373 is temp~1135 at LC2_B5
--operation mode is normal

A1L373 = !m[0] & b # !temp[3];


--a is a at LC1_B18
--operation mode is normal

a_lut_out = m_reg[1] & (m_reg[0] $ m[0] # !m[1]) # !m_reg[1] & (m[1] # m_reg[0] $ m[0]);
a = DFFEA(a_lut_out, GLOBAL(clk2), , , , , );

--A1L2Q is a~0 at LC1_B18
--operation mode is normal

A1L2Q = a;


--A1L563 is temp~1115 at LC3_B5
--operation mode is normal

A1L563 = !temp[2] & (m[0] # !b);

--A1L473 is temp~1136 at LC3_B5
--operation mode is normal

A1L473 = !temp[2] & (m[0] # !b);


--A1L663 is temp~1116 at LC2_B6
--operation mode is normal

A1L663 = b & (m[0] & (temp[1] # !m[1]) # !m[0] & m[1]) # !b & (temp[1]);

--A1L573 is temp~1137 at LC2_B6
--operation mode is normal

A1L573 = b & (m[0] & (temp[1] # !m[1]) # !m[0] & m[1]) # !b & (temp[1]);


--C3_unreg_res_node[4] is lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4] at LC8_B8
--operation mode is normal

C3_unreg_res_node[4] = E9_cout[3] $ y2[4];

--C3L3 is lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4]~9 at LC8_B8
--operation mode is normal

C3L3 = E9_cout[3] $ y2[4];


--q is q at LC3_B2
--operation mode is normal

q_lut_out = !c3;
q = DFFEA(q_lut_out, clk1, , , , A1L21, reset);

--A1L223Q is q~1 at LC3_B2
--operation mode is normal

A1L223Q = q;


--clk1 is clk1 at LC7_B12
--operation mode is normal

clk1_lut_out = !reset & (A1L523 $ !clk1);
clk1 = DFFEA(clk1_lut_out, GLOBAL(clk), , , , , );

--A1L61Q is clk1~94 at LC7_B12
--operation mode is normal

A1L61Q = clk1;


--contl is contl at LC5_B10
--operation mode is normal

contl_lut_out = !contl;
contl = DFFEA(contl_lut_out, clk1, , , , , );

--A1L02Q is contl~1 at LC5_B10
--operation mode is normal

A1L02Q = contl;


--reg is reg at LC4_B10
--operation mode is normal

reg_lut_out = q;
reg = DFFEA(reg_lut_out, clk1, , , A1L533, , );

--A1L633Q is reg~2 at LC4_B10
--operation mode is normal

A1L633Q = reg;


--m_reg[0] is m_reg[0] at LC2_B18
--operation mode is normal

m_reg[0]_lut_out = m[0];
m_reg[0] = DFFEA(m_reg[0]_lut_out, GLOBAL(clk2), , , , , );

--A1L23Q is m_reg[0]~2 at LC2_B18
--operation mode is normal

A1L23Q = m_reg[0];


--m_reg[1] is m_reg[1] at LC3_B18
--operation mode is normal

m_reg[1]_lut_out = m[1];
m_reg[1] = DFFEA(m_reg[1]_lut_out, GLOBAL(clk2), , , , , );

--A1L43Q is m_reg[1]~3 at LC3_B18
--operation mode is normal

A1L43Q = m_reg[1];


--c3 is c3 at LC4_B2
--operation mode is normal

c3_lut_out = !c2;
c3 = DFFEA(c3_lut_out, clk1, !reset, , , , );

--A1L31Q is c3~2 at LC4_B2
--operation mode is normal

A1L31Q = c3;


--y1[4] is y1[4] at LC6_B12
--operation mode is normal

y1[4]_lut_out = !reset & E21_cs_buffer[4] & A1L523;
y1[4] = DFFEA(y1[4]_lut_out, GLOBAL(clk), , , , , );

--A1L683Q is y1[4]~835 at LC6_B12
--operation mode is normal

A1L683Q = y1[4];


--y1[3] is y1[3] at LC5_B12
--operation mode is normal

y1[3]_lut_out = !reset & E21_cs_buffer[3] & A1L523;
y1[3] = DFFEA(y1[3]_lut_out, GLOBAL(clk), , , , , );

--A1L483Q is y1[3]~836 at LC5_B12
--operation mode is normal

A1L483Q = y1[3];


--y1[2] is y1[2] at LC2_B10
--operation mode is normal

y1[2]_lut_out = E21_cs_buffer[2] # reset;
y1[2] = DFFEA(y1[2]_lut_out, GLOBAL(clk), , , , , );

--A1L283Q is y1[2]~837 at LC2_B10
--operation mode is normal

A1L283Q = y1[2];


--y1[1] is y1[1] at LC1_B10
--operation mode is normal

y1[1]_lut_out = E21_cs_buffer[1] # reset;
y1[1] = DFFEA(y1[1]_lut_out, GLOBAL(clk), , , , , );

--A1L083Q is y1[1]~838 at LC1_B10
--operation mode is normal

A1L083Q = y1[1];


--A1L423 is reduce_nor~131 at LC8_B12
--operation mode is normal

A1L423 = y1[3] # y1[4] # !y1[2] # !y1[1];

--A1L923 is reduce_nor~142 at LC8_B12
--operation mode is normal

A1L923 = y1[3] # y1[4] # !y1[2] # !y1[1];


--y1[13] is y1[13] at LC8_B15
--operation mode is normal

y1[13]_lut_out = !reset & C4_unreg_res_node[13] & A1L523;
y1[13] = DFFEA(y1[13]_lut_out, GLOBAL(clk), , , , , );

--A1L404Q is y1[13]~839 at LC8_B15
--operation mode is normal

A1L404Q = y1[13];


--y1[0] is y1[0] at LC2_B13
--operation mode is up_dn_cntr

y1[0]_lut_out = reset # !y1[0];
y1[0] = DFFEA(y1[0]_lut_out, GLOBAL(clk), , , , , );

--A1L873Q is y1[0]~840 at LC2_B13
--operation mode is up_dn_cntr

A1L873Q = y1[0];

--E21_cout[0] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[0] at LC2_B13
--operation mode is up_dn_cntr

E21_cout[0] = CARRY(y1[0]);


--A1L523 is reduce_nor~133 at LC2_B12
--operation mode is normal

A1L523 = y1[13] # A1L423 # !A1L723 # !y1[0];

--A1L033 is reduce_nor~143 at LC2_B12
--operation mode is normal

A1L033 = y1[13] # A1L423 # !A1L723 # !y1[0];


--c2 is c2 at LC5_B2
--operation mode is normal

c2_lut_out = c1;
c2 = DFFEA(c2_lut_out, clk1, !reset, , , , );

--A1L01Q is c2~1 at LC5_B2
--operation mode is normal

A1L01Q = c2;


--E21_cs_buffer[4] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC6_B13
--operation mode is arithmetic

E21_cs_buffer[4] = y1[4] $ E21_cout[3];

--E21L32 is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~184 at LC6_B13
--operation mode is arithmetic

E21L32 = y1[4] $ E21_cout[3];

--E21_cout[4] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[4] at LC6_B13
--operation mode is arithmetic

E21_cout[4] = CARRY(y1[4] & E21_cout[3]);


--E21_cs_buffer[3] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC5_B13
--operation mode is arithmetic

E21_cs_buffer[3] = y1[3] $ E21_cout[2];

--E21L12 is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~185 at LC5_B13
--operation mode is arithmetic

E21L12 = y1[3] $ E21_cout[2];

--E21_cout[3] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[3] at LC5_B13
--operation mode is arithmetic

E21_cout[3] = CARRY(y1[3] & E21_cout[2]);


--E21_cs_buffer[2] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC4_B13
--operation mode is arithmetic

E21_cs_buffer[2] = y1[2] $ E21_cout[1];

--E21L91 is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~186 at LC4_B13
--operation mode is arithmetic

E21L91 = y1[2] $ E21_cout[1];

--E21_cout[2] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[2] at LC4_B13
--operation mode is arithmetic

E21_cout[2] = CARRY(y1[2] & E21_cout[1]);


--E21_cs_buffer[1] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC3_B13
--operation mode is arithmetic

E21_cs_buffer[1] = y1[1] $ E21_cout[0];

--E21L71 is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~187 at LC3_B13
--operation mode is arithmetic

E21L71 = y1[1] $ E21_cout[0];

--E21_cout[1] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[1] at LC3_B13
--operation mode is arithmetic

E21_cout[1] = CARRY(y1[1] & E21_cout[0]);


--c1 is c1 at LC7_B2
--operation mode is normal

c1_lut_out = c2 $ !c3;
c1 = DFFEA(c1_lut_out, clk1, !reset, , , , );

--A1L8Q is c1~1 at LC7_B2
--operation mode is normal

A1L8Q = c1;


--E21_cs_buffer[12] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[12] at LC6_B15
--operation mode is arithmetic

E21_cs_buffer[12] = y1[12] $ E21_cout[11];

--E21L93 is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[12]~188 at LC6_B15
--operation mode is arithmetic

E21L93 = y1[12] $ E21_cout[11];

--E21_cout[12] is lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[12] at LC6_B15
--operation mode is arithmetic

E21_cout[12] = CARRY(y1[12] & E21_cout[11]);


--C4_unreg_res_node[13] is lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[13] at LC7_B15
--operation mode is normal

C4_unreg_res_node[13] = E21_cout[12] $ y1[13];

--C4L3 is lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[13]~27 at LC7_B15
--operation mode is normal

C4L3 = E21_cout[12] $ y1[13];


--y1[8] is y1[8] at LC3_B24
--operation mode is normal

y1[8]_lut_out = reset # E21_cs_buffer[8] & A1L523;
y1[8] = DFFEA(y1[8]_lut_out, GLOBAL(clk), , , , , );

--A1L493Q is y1[8]~841 at LC3_B24
--operation mode is normal

A1L493Q = y1[8];


--y1[7] is y1[7] at LC2_B24
--operation mode is normal

y1[7]_lut_out = reset # E21_cs_buffer[7] & A1L523;
y1[7] = DFFEA(y1[7]_lut_out, GLOBAL(clk), , , , , );

--A1L293Q is y1[7]~842 at LC2_B24
--operation mode is normal

A1L293Q = y1[7];


--y1[6] is y1[6] at LC1_B24
--operation mode is normal

y1[6]_lut_out = !reset & E21_cs_buffer[6] & A1L523;
y1[6] = DFFEA(y1[6]_lut_out, GLOBAL(clk), , , , , );

--A1L093Q is y1[6]~843 at LC1_B24
--operation mode is normal

A1L093Q = y1[6];


--y1[5] is y1[5] at LC1_B13
--operation mode is normal

y1[5]_lut_out = !reset & E21_cs_buffer[5] & A1L523;
y1[5] = DFFEA(y1[5]_lut_out, GLOBAL(clk), , , , , );

--A1L883Q is y1[5]~844 at LC1_B13
--operation mode is normal

A1L883Q = y1[5];


--A1L623 is reduce_nor~137 at LC6_B24
--operation mode is normal

A1L623 = !y1[5] & !y1[6] & y1[7] & y1[8];

--A1L133 is reduce_nor~144 at LC6_B24
--operation mode is normal

A1L133 = !y1[5] & !y1[6] & y1[7] & y1[8];

--A1L233 is reduce_nor~145 at LC6_B24
--operation mode is normal

A1L233 = !y1[5] & !y1[6] & y1[7] & y1[8];


--y1[12] is y1[12] at LC8_B24
--operation mode is normal

y1[12]_lut_out = reset # E21_cs_buffer[12] & A1L523;
y1[12] = DFFEA(y1[12]_lut_out, GLOBAL(clk), , , , , );

--A1L204Q is y1[12]~845 at LC8_B24
--operation mode is norm