lpm_constant_jq6.tdf

Verilog 经典实例

--lpm_constant ENABLE_RUNTIME_MOD="NO" LPM_CVALUE=ABCD LPM_WIDTH=16 result
--VERSION_BEGIN 7.2 cbx_lpm_constant 2006:12:21:09:16:46:SJ cbx_mgl 2007:08:03:15:48:12:SJ  VERSION_END


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--synthesis_resources = 
SUBDESIGN lpm_constant_jq6
( 
	result[15..0]	:	output;
) 

BEGIN 
	result[] = B"1010101111001101";
END;
--VALID FILE