seg7led.map.summary

Verilog 经典实例

Analysis & Synthesis Status : Successful - Fri Dec 28 21:56:40 2007
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : seg7led
Top-level Entity Name : seg7led
Family : Cyclone
Total logic elements : 92
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : N/A until Partition Merge
Total PLLs : 0
Total DLLs : N/A until Partition Merge