serial_verilog.fit.summary
来自「Verilog 经典实例」· SUMMARY 代码 · 共 12 行
SUMMARY
12 行
Fitter Status : Successful - Sun Nov 19 22:42:57 2006
Quartus II Version : 5.1 Build 216 03/06/2006 SP 2 SJ Full Version
Revision Name : serial_verilog
Top-level Entity Name : serial_verilog
Family : MAX II
Device : EPM1270T144C5
Timing Models : Final
Total logic elements : 80 / 1,270 ( 6 % )
Total pins : 4 / 116 ( 3 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )
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