multl6s.cr.mti

来自「Verilog 经典实例」· MTI 代码 · 共 14 行

G:/Q71/verilog/multl6s/mult16S_tb.tf {1 {vlog -work work -novopt -y D:/Modeltech_6.2b/examples G:/Q71/verilog/multl6s/mult16S_tb.tf
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module testbench
-- Scanning library directory 'D:/Modeltech_6.2b/examples'
-- Scanning library directory 'D:/Modeltech_6.2b/examples'

Referenced (but uncompiled) modules or primitives:
	mult16S

Top level modules:
	testbench

} {} {}}