_deps

Verilog 经典实例

H 2141964 10 1 0 2 2 0 0 0 0
L 4 work 4 work
D 12 work.mult16S zQ?i1=R<An_RD=M7bU[Zj1 0 0
D 14 work.testbench 7`]`bA3<>_EIRIaB8md:l3 1 0
2 4 fast 0 mWGdahYlOb]Z6fh3@=;VG1 0 0 0
2 4 fast 0 G<G6KIhH@HCA5YVenj5Kc0 1 1 1