da_tlc5620.fit.summary

来自「Verilog 经典实例」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Tue Jan 15 12:38:41 2008
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version
Revision Name : DA_TLC5620
Top-level Entity Name : DA_TLC5620
Family : Cyclone II
Device : EP2C5Q208C8
Timing Models : Final
Total logic elements : 825 / 4,608 ( 18 % )
    Total combinational functions : 825 / 4,608 ( 18 % )
    Dedicated logic registers : 145 / 4,608 ( 3 % )
Total registers : 145
Total pins : 26 / 142 ( 18 % )
Total virtual pins : 0
Total memory bits : 0 / 119,808 ( 0 % )
Embedded Multiplier 9-bit elements : 2 / 26 ( 8 % )
Total PLLs : 0 / 2 ( 0 % )