mydff.cnx

Verilog 经典实例

GENERATION: STANDARD
VERSION: WM1.0
MODULE: lpm_ff

CBXDLL: cbx_lpm_ff 

PRIVATE: ACLR NUMERIC "0"
PRIVATE: ALOAD NUMERIC "0"
PRIVATE: ASET NUMERIC "0"
PRIVATE: ASETV NUMERIC "0"
PRIVATE: ASET_ALL1 NUMERIC "1"
PRIVATE: CLK_EN NUMERIC "0"
PRIVATE: DFF NUMERIC "1"
PRIVATE: SCLR NUMERIC "0"
PRIVATE: SLOAD NUMERIC "0"
PRIVATE: SSET NUMERIC "0"
PRIVATE: SSETV NUMERIC "0"
PRIVATE: SSET_ALL1 NUMERIC "1"
PRIVATE: UseTFFdataPort NUMERIC "0"
PRIVATE: nBit NUMERIC "1"

CONSTANT: LPM_FFTYPE STRING "DFF" 
CONSTANT: LPM_TYPE STRING "LPM_FF" 
CONSTANT: LPM_WIDTH NUMERIC "1" 

USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock 
USED_PORT: data 0 0 0 0 INPUT NODEFVAL data 
USED_PORT: q 0 0 0 0 OUTPUT NODEFVAL q 

CONNECT: @clock 0 0 0 0 clock 0 0 0 0
CONNECT: q 0 0 0 0 @q 0 0 1 0
CONNECT: @data 0 0 1 0 data 0 0 0 0

LIBRARY: lpm lpm.lpm_components.all

GEN_FILE: TYPE_NORMAL mydff.v TRUE 
GEN_FILE: TYPE_NORMAL mydff.inc FALSE 
GEN_FILE: TYPE_NORMAL mydff.cmp FALSE 
GEN_FILE: TYPE_NORMAL mydff.bsf TRUE 
GEN_FILE: TYPE_NORMAL mydff_inst.v TRUE 
GEN_FILE: TYPE_NORMAL mydff_bb.v TRUE 

SYMBOL: BOX 144 80 57 63 Arial,10
SYMBOL: LINE 16 64 128 64 SOLID THIN
SYMBOL: LINE 128 64 128 16 SOLID THIN
SYMBOL: LINE 128 16 16 16 SOLID THIN
SYMBOL: LINE 16 16 16 64 SOLID THIN
SYMBOL: TEXT "DFF" 109 51 HORIZ Arial,7
SYMBOL: PINSTUB 0 48 IN data 20 41 "data" HORIZ Arial,8
SYMBOL: LINE 0 48 16 48 SOLID THIN
SYMBOL: PINSTUB 0 32 IN clock 26 25 "clock" HORIZ Arial,8
SYMBOL: LINE 0 32 16 32 SOLID THIN
SYMBOL: LINE 16 38 22 32 SOLID THIN
SYMBOL: LINE 22 32 16 26 SOLID THIN
SYMBOL: PINSTUB 144 32 OUT q 119 25 "q" HORIZ Arial,8
SYMBOL: LINE 144 32 128 32 SOLID THIN