frequency10.vhd

来自「max_plus开发的 有max_plus就可以直接运行的交通灯制作 用vhdl」· VHDL 代码 · 共 29 行

LIBRARY IEEE;
USE IEEE.Std_Logic_1164.ALL;
        

ENTITY Frequency10 IS
PORT ( Clk20Hz: in Std_logic ;
       Clk10Hz: out Std_logic);
END  ;


ARCHITECTURE behavior OF Frequency10 IS
constant N:integer:=4;
signal Counter: integer range 0 to N;
signal Clk:std_logic;
BEGIN
  PROCESS(Clk20Hz)
  BEGIN
      IF rising_edge(Clk20Hz) then
         if Counter=N then
            Counter<=0;
            Clk<=not Clk;
         else
            Counter<=Counter+1;
         end if;
      END IF;
  END PROCESS;
  clk10Hz<=clk;
end;