counter.vhd

来自「max_plus开发的 有max_plus就可以直接运行的交通灯制作 用vhdl」· VHDL 代码 · 共 31 行

LIBRARY IEEE;
USE IEEE.Std_Logic_1164.ALL;
        
ENTITY Counter IS
PORT ( Clock: in Std_logic; 
       Reset:  in Std_logic;
       Hold: in Std_logic;
       CountNum: buffer Integer range 0 to 49 );
END Counter ;

ARCHITECTURE behavior OF Counter IS
BEGIN
  PROCESS(Reset,Clock)
  BEGIN
      IF reset ='1' then
         CountNum<=0;
      elsif  rising_edge(clock) then 
         if Hold='1' then
            CountNum<=CountNum;
         else
            if CountNum=49 then
               CountNum<=0;
            else
               CountNum<=CountNum+1;
            end if;
         end if;
      END IF;
  END PROCESS;
END ;