counter.map.eqn

verilog写的频率计程序的计数模块,

B6_dffs[1]_p2_out = EN & !CLR & B2_dffs[0] & !B2_dffs[1] & !B2_dffs[2] & B2_dffs[3] & B1_dffs[0] & !B1_dffs[1] & !B1_dffs[2] & B1_dffs[3] & B3_dffs[0] & !B3_dffs[1] & !B3_dffs[2] & B3_dffs[3] & B4_dffs[0] & !B4_dffs[1] & !B4_dffs[2] & B4_dffs[3] & B5_dffs[0] & !B5_dffs[1] & !B5_dffs[2] & B5_dffs[3] & B6_dffs[0] & B6_dffs[2];
B6_dffs[1]_p3_out = !EN & B6_dffs[1];
B6_dffs[1]_p4_out = CLR & B6_dffs[1];
B6_dffs[1]_or_out = B6_dffs[1]_p0_out # B6_dffs[1]_p1_out # B6_dffs[1]_p2_out # B6_dffs[1]_p3_out # B6_dffs[1]_p4_out;
B6_dffs[1]_reg_input = B6_dffs[1]_or_out;
B6_dffs[1] = TFFE(B6_dffs[1]_reg_input, GLOBAL(F_IN), , , );


--B6_dffs[2] is lpm_counter:Q5_rtl_5|dffs[2]
B6_dffs[2]_p1_out = B6_dffs[1] & B6_dffs[0] & B5_dffs[3] & !B5_dffs[2] & !B5_dffs[1] & B5_dffs[0] & B4_dffs[3] & !B4_dffs[2] & !B4_dffs[1] & B4_dffs[0] & B3_dffs[3] & !B3_dffs[2] & !B3_dffs[1] & B3_dffs[0] & B1_dffs[3] & !B1_dffs[2] & !B1_dffs[1] & B1_dffs[0] & B2_dffs[3] & !B2_dffs[2] & !B2_dffs[1] & B2_dffs[0] & EN & !CLR;
B6_dffs[2]_p2_out = !EN & B6_dffs[2];
B6_dffs[2]_p3_out = CLR & B6_dffs[2];
B6_dffs[2]_or_out = B6_dffs[2]_p1_out # B6_dffs[2]_p2_out # B6_dffs[2]_p3_out;
B6_dffs[2]_reg_input = B6_dffs[2]_or_out;
B6_dffs[2] = TFFE(B6_dffs[2]_reg_input, GLOBAL(F_IN), , , );


--B6_dffs[3] is lpm_counter:Q5_rtl_5|dffs[3]
B6_dffs[3]_p1_out = B6_dffs[2] & B6_dffs[1] & B6_dffs[0] & B5_dffs[3] & !B5_dffs[2] & !B5_dffs[1] & B5_dffs[0] & B4_dffs[3] & !B4_dffs[2] & !B4_dffs[1] & B4_dffs[0] & B3_dffs[3] & !B3_dffs[2] & !B3_dffs[1] & B3_dffs[0] & B1_dffs[3] & !B1_dffs[2] & !B1_dffs[1] & B1_dffs[0] & B2_dffs[3] & !B2_dffs[2] & !B2_dffs[1] & B2_dffs[0] & EN & !CLR;
B6_dffs[3]_p2_out = !B6_dffs[2] & !B6_dffs[1] & B6_dffs[0] & B5_dffs[3] & !B5_dffs[2] & !B5_dffs[1] & B5_dffs[0] & B4_dffs[3] & !B4_dffs[2] & !B4_dffs[1] & B4_dffs[0] & B3_dffs[3] & !B3_dffs[2] & !B3_dffs[1] & B3_dffs[0] & B1_dffs[3] & !B1_dffs[2] & !B1_dffs[1] & B1_dffs[0] & B2_dffs[3] & !B2_dffs[2] & !B2_dffs[1] & B2_dffs[0] & B6_dffs[3];
B6_dffs[3]_p3_out = !EN & B6_dffs[3];
B6_dffs[3]_p4_out = CLR & B6_dffs[3];
B6_dffs[3]_or_out = B6_dffs[3]_p1_out # B6_dffs[3]_p2_out # B6_dffs[3]_p3_out # B6_dffs[3]_p4_out;
B6_dffs[3]_reg_input = B6_dffs[3]_or_out;
B6_dffs[3] = TFFE(B6_dffs[3]_reg_input, GLOBAL(F_IN), , , );


--A1L5Q is F_OUT~reg0
A1L5Q_p1_out = B5_dffs[3] & !B5_dffs[2] & !B5_dffs[1] & B5_dffs[0] & B4_dffs[3] & !B4_dffs[2] & !B4_dffs[1] & B4_dffs[0] & B3_dffs[3] & !B3_dffs[2] & !B3_dffs[1] & B3_dffs[0] & B1_dffs[3] & !B1_dffs[2] & !B1_dffs[1] & B1_dffs[0] & B2_dffs[3] & !B2_dffs[2] & !B2_dffs[1] & B2_dffs[0] & B6_dffs[3] & !B6_dffs[2] & !B6_dffs[1] & B6_dffs[0];
A1L5Q_or_out = A1L5Q_p1_out # !EN # CLR;
A1L5Q_reg_input = A1L5Q_or_out;
A1L5Q = DFFE(A1L5Q_reg_input, GLOBAL(F_IN), , , );


--EN is EN
--operation mode is input

EN = INPUT();


--CLR is CLR
--operation mode is input

CLR = INPUT();


--F_IN is F_IN
--operation mode is input

F_IN = INPUT();


--Q0[0] is Q0[0]
--operation mode is output

Q0[0] = OUTPUT(B1_dffs[0]);


--Q0[1] is Q0[1]
--operation mode is output

Q0[1] = OUTPUT(B1_dffs[1]);


--Q0[2] is Q0[2]
--operation mode is output

Q0[2] = OUTPUT(B1_dffs[2]);


--Q0[3] is Q0[3]
--operation mode is output

Q0[3] = OUTPUT(B1_dffs[3]);


--Q1[0] is Q1[0]
--operation mode is output

Q1[0] = OUTPUT(B2_dffs[0]);


--Q1[1] is Q1[1]
--operation mode is output

Q1[1] = OUTPUT(B2_dffs[1]);


--Q1[2] is Q1[2]
--operation mode is output

Q1[2] = OUTPUT(B2_dffs[2]);


--Q1[3] is Q1[3]
--operation mode is output

Q1[3] = OUTPUT(B2_dffs[3]);


--Q2[0] is Q2[0]
--operation mode is output

Q2[0] = OUTPUT(B3_dffs[0]);


--Q2[1] is Q2[1]
--operation mode is output

Q2[1] = OUTPUT(B3_dffs[1]);


--Q2[2] is Q2[2]
--operation mode is output

Q2[2] = OUTPUT(B3_dffs[2]);


--Q2[3] is Q2[3]
--operation mode is output

Q2[3] = OUTPUT(B3_dffs[3]);


--Q3[0] is Q3[0]
--operation mode is output

Q3[0] = OUTPUT(B4_dffs[0]);


--Q3[1] is Q3[1]
--operation mode is output

Q3[1] = OUTPUT(B4_dffs[1]);


--Q3[2] is Q3[2]
--operation mode is output

Q3[2] = OUTPUT(B4_dffs[2]);


--Q3[3] is Q3[3]
--operation mode is output

Q3[3] = OUTPUT(B4_dffs[3]);


--Q4[0] is Q4[0]
--operation mode is output

Q4[0] = OUTPUT(B5_dffs[0]);


--Q4[1] is Q4[1]
--operation mode is output

Q4[1] = OUTPUT(B5_dffs[1]);


--Q4[2] is Q4[2]
--operation mode is output

Q4[2] = OUTPUT(B5_dffs[2]);


--Q4[3] is Q4[3]
--operation mode is output

Q4[3] = OUTPUT(B5_dffs[3]);


--Q5[0] is Q5[0]
--operation mode is output

Q5[0] = OUTPUT(B6_dffs[0]);


--Q5[1] is Q5[1]
--operation mode is output

Q5[1] = OUTPUT(B6_dffs[1]);


--Q5[2] is Q5[2]
--operation mode is output

Q5[2] = OUTPUT(B6_dffs[2]);


--Q5[3] is Q5[3]
--operation mode is output

Q5[3] = OUTPUT(B6_dffs[3]);


--F_OUT is F_OUT
--operation mode is output

F_OUT = OUTPUT(A1L5Q);