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来自「一个完整的viterbi(2,1,7)编码程序」· 代码 · 共 52 行

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# Reading D:/Modeltech_6.1b/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.1b Sep  8 2005 
# //
# //  Copyright Mentor Graphics Corporation 2005
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# do bianma.ldo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module DFF
# -- Compiling module BC
# -- Compiling module bianma
# 
# Top level modules:
# 	bianma
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module glbl
# 
# Top level modules:
# 	glbl
# vsim -L uni9000_ver -t 1ps bianma glbl 
# Loading work.bianma
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# Loading work.DFF
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'uni9000_ver' at "uni9000_ver".
# No such file or directory. (errno = ENOENT)
# Loading work.BC
# Loading work.glbl
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
# .main_pane.workspace
# .main_pane.signals.interior.cs
wave modify -driver freeze -pattern clock -initialvalue HiZ -period 100ps -dutycycle 50 -starttime 0ps -endtime 1000ps sim:/bianma/Din
wave modify -driver freeze -pattern clock -initialvalue HiZ -period 100ps -dutycycle 50 -starttime 0ps -endtime 1000ps sim:/bianma/CLK1
wave modify -driver expectedOutput -pattern clock -initialvalue x -period 100ps -dutycycle 50 -starttime 0ps -endtime 1000ps sim:/bianma/Dout1
wave modify -driver expectedOutput -pattern repeater -initialvalue x -period 50ps -sequence { 1  } -repeat forever -starttime 0ps -endtime 1000ps sim:/bianma/Dout2

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