clock60.inc

来自「以前学习VHDL语言时做的一个电子闹钟程序」· INC 代码 · 共 27 行

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

-- MAX+plus II Include File
-- Version 10.2 06/28/2002
-- Created: Wed Apr 16 00:58:45 2008

FUNCTION clock60 (cp, rst, rst1, rst2, set, cp1, ma1, ma3, mb1, mb3, mc1, mc3, md1, md3, ma2, ma4, mb2, mb4, mc2, mc4, md2, md4)
    RETURNS (a3, a1, b3, b1, c3, c1, d3, d1, a4, a2, b4, b2, c4, c2, d4, d2, a5, b5, c5, d5, a6, b6, c6, d6, co, alarm);