seg7test.map.summary

来自「使用VHDL语言」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Wed Jul 02 13:02:11 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : seg7test
Top-level Entity Name : bin27seg
Family : Cyclone II
Total logic elements : 7
    Total combinational functions : 7
    Dedicated logic registers : 0
Total registers : 0
Total pins : 11
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0