mult_s_timesim.v

64位乘法器源码verilog,经过验证测试

// Xilinx Verilog netlist produced by netgen application (version G.31a)
// Command      : -intstyle ise -s 6 -pcf mult_s.pcf -ngm mult_s.ngm -w -ofmt verilog -sim mult_s.ncd mult_s_timesim.v 
// Input file   : mult_s.ncd
// Output file  : mult_s_timesim.v
// Design name  : mult_s
// # of Modules : 1
// Xilinx       : C:/Xilinx
// Device       : 2s50tq144-6 (PRODUCTION 1.27 2003-12-13)

// This verilog netlist is a simulation model and uses simulation 
// primitives which may not represent the true implementation of the 
// device, however the netlist is functionally correct and should not 
// be modified. This file cannot be synthesized and should only be used 
// with supported simulation tools.

`timescale 1 ns/1 ps

module mult_s (
p, y, x
);
  output [15 : 0] p;
  input [7 : 0] y;
  input [7 : 0] x;
  wire p_10_OBUF;
  wire p_11_OBUF;
  wire p_12_OBUF;
  wire p_13_OBUF;
  wire p_14_OBUF;
  wire p_15_OBUF;
  wire x_0_IBUF;
  wire x_1_IBUF;
  wire x_2_IBUF;
  wire x_3_IBUF;
  wire y_0_IBUF;
  wire x_4_IBUF;
  wire y_1_IBUF;
  wire x_5_IBUF;
  wire y_2_IBUF;
  wire x_6_IBUF;
  wire y_3_IBUF;
  wire x_7_IBUF;
  wire y_4_IBUF;
  wire y_5_IBUF;
  wire y_6_IBUF;
  wire y_7_IBUF;
  wire Mmult_p_inst_lut2_0;
  wire p_1_OBUF;
  wire Mmult_p_inst_lut2_4;
  wire p_3_OBUF;
  wire Mmult_p_inst_lut2_24;
  wire p_5_OBUF;
  wire p_6_OBUF;
  wire p_7_OBUF;
  wire p_8_OBUF;
  wire p_9_OBUF;
  wire Mmult_p_inst_cy_11;
  wire Mmult_p_N64;
  wire Mmult_p_inst_cy_13;
  wire Mmult_p_N69;
  wire Mmult_p_N74;
  wire Mmult_p_inst_cy_15;
  wire Mmult_p_N79;
  wire Mmult_p_N84;
  wire Mmult_p_inst_cy_17;
  wire Mmult_p_N89;
  wire Mmult_p_N94;
  wire Mmult_p_N99;
  wire Mmult_p_N104;
  wire Mmult_p_inst_cy_21;
  wire Mmult_p_N114;
  wire Mmult_p_inst_cy_23;
  wire Mmult_p_N119;
  wire Mmult_p_N124;
  wire Mmult_p_inst_cy_25;
  wire Mmult_p_N129;
  wire Mmult_p_N134;
  wire Mmult_p_inst_cy_27;
  wire Mmult_p_N139;
  wire Mmult_p_N144;
  wire Mmult_p_N149;
  wire Mmult_p_N154;
  wire Mmult_p_inst_cy_31;
  wire Mmult_p_N161;
  wire Mmult_p_N166;
  wire Mmult_p_inst_cy_33;
  wire Mmult_p_N171;
  wire Mmult_p_N176;
  wire Mmult_p_inst_cy_35;
  wire Mmult_p_N181;
  wire Mmult_p_N186;
  wire Mmult_p_inst_cy_37;
  wire Mmult_p_N191;
  wire Mmult_p_N196;
  wire Mmult_p_N201;
  wire Mmult_p_N204;
  wire Mmult_p_inst_cy_40;
  wire Mmult_p_N19;
  wire Mmult_p_N24;
  wire Mmult_p_inst_cy_42;
  wire Mmult_p_N29;
  wire Mmult_p_N34;
  wire Mmult_p_N209;
  wire Mmult_p_N210;
  wire Mmult_p_inst_cy_44;
  wire Mmult_p_N39;
  wire Mmult_p_N44;
  wire Mmult_p_N211;
  wire Mmult_p_N212;
  wire Mmult_p_inst_cy_46;
  wire Mmult_p_N49;
  wire Mmult_p_N54;
  wire Mmult_p_N213;
  wire Mmult_p_N214;
  wire Mmult_p_N215;
  wire Mmult_p_N216;
  wire Mmult_p_inst_cy_49;
  wire Mmult_p_N263;
  wire Mmult_p_inst_cy_51;
  wire Mmult_p_N264;
  wire Mmult_p_N265;
  wire Mmult_p_inst_cy_53;
  wire Mmult_p_N266;
  wire Mmult_p_N267;
  wire Mmult_p_inst_cy_55;
  wire Mmult_p_N268;
  wire Mmult_p_N269;
  wire Mmult_p_N270;
  wire Mmult_p_N271;
  wire Mmult_p_inst_cy_58;
  wire Mmult_p_inst_cy_60;
  wire Mmult_p_inst_cy_62;
  wire Mmult_p_inst_cy_64;
  wire Mmult_p_inst_cy_66;
  wire Mmult_p_inst_cy_1;
  wire Mmult_p_inst_cy_3;
  wire Mmult_p_inst_cy_5;
  wire Mmult_p_inst_cy_7;
  wire GSR = glbl.GSR;
  wire GTS = glbl.GTS;
  wire \p<10>/ENABLE ;
  wire \p<10>/TORGTS ;
  wire \p<10>/OUTMUX ;
  wire \p<11>/ENABLE ;
  wire \p<11>/TORGTS ;
  wire \p<11>/OUTMUX ;
  wire \p<12>/ENABLE ;
  wire \p<12>/TORGTS ;
  wire \p<12>/OUTMUX ;
  wire \p<13>/ENABLE ;
  wire \p<13>/TORGTS ;
  wire \p<13>/OUTMUX ;
  wire \p<14>/ENABLE ;
  wire \p<14>/TORGTS ;
  wire \p<14>/OUTMUX ;
  wire \p<15>/ENABLE ;
  wire \p<15>/TORGTS ;
  wire \p<15>/OUTMUX ;
  wire \x<0>/IBUF ;
  wire \x<1>/IBUF ;
  wire \x<2>/IBUF ;
  wire \x<3>/IBUF ;
  wire \y<0>/IBUF ;
  wire \x<4>/IBUF ;
  wire \y<1>/IBUF ;
  wire \x<5>/IBUF ;
  wire \y<2>/IBUF ;
  wire \x<6>/IBUF ;
  wire \y<3>/IBUF ;
  wire \x<7>/IBUF ;
  wire \y<4>/IBUF ;
  wire \y<5>/IBUF ;
  wire \y<6>/IBUF ;
  wire \y<7>/IBUF ;
  wire \p<0>/ENABLE ;
  wire \p<0>/TORGTS ;
  wire \p<0>/OUTMUX ;
  wire \p<1>/ENABLE ;
  wire \p<1>/TORGTS ;
  wire \p<1>/OUTMUX ;
  wire \p<2>/ENABLE ;
  wire \p<2>/TORGTS ;
  wire \p<2>/OUTMUX ;
  wire \p<3>/ENABLE ;
  wire \p<3>/TORGTS ;
  wire \p<3>/OUTMUX ;
  wire \p<4>/ENABLE ;
  wire \p<4>/TORGTS ;
  wire \p<4>/OUTMUX ;
  wire \p<5>/ENABLE ;
  wire \p<5>/TORGTS ;
  wire \p<5>/OUTMUX ;
  wire \p<6>/ENABLE ;
  wire \p<6>/TORGTS ;
  wire \p<6>/OUTMUX ;
  wire \p<7>/ENABLE ;
  wire \p<7>/TORGTS ;
  wire \p<7>/OUTMUX ;
  wire \p<8>/ENABLE ;
  wire \p<8>/TORGTS ;
  wire \p<8>/OUTMUX ;
  wire \p<9>/ENABLE ;
  wire \p<9>/TORGTS ;
  wire \p<9>/OUTMUX ;
  wire Mmult_p_inst_multand_10;
  wire Mmult_p_inst_lut2_1;
  wire \Mmult_p_N64/CYMUXG ;
  wire Mmult_p_inst_multand_11;
  wire \Mmult_p_N64/XORG ;
  wire Mmult_p_inst_lut4_9;
  wire Mmult_p_inst_cy_10;
  wire \Mmult_p_N64/LOGIC_ZERO ;
  wire Mmult_p_inst_multand_12;
  wire Mmult_p_inst_lut4_10;
  wire \Mmult_p_N69/XORF ;
  wire \Mmult_p_N69/CYMUXG ;
  wire Mmult_p_inst_multand_13;
  wire \Mmult_p_N69/XORG ;
  wire Mmult_p_inst_lut4_11;
  wire Mmult_p_inst_cy_12;
  wire \Mmult_p_N69/CYINIT ;
  wire Mmult_p_inst_multand_14;
  wire Mmult_p_inst_lut4_12;
  wire \Mmult_p_N79/XORF ;
  wire \Mmult_p_N79/CYMUXG ;
  wire Mmult_p_inst_multand_15;
  wire \Mmult_p_N79/XORG ;
  wire Mmult_p_inst_lut4_13;
  wire Mmult_p_inst_cy_14;
  wire \Mmult_p_N79/CYINIT ;
  wire Mmult_p_inst_multand_16;
  wire Mmult_p_inst_lut4_14;
  wire \Mmult_p_N89/XORF ;
  wire \Mmult_p_N89/CYMUXG ;
  wire Mmult_p_inst_multand_17;
  wire \Mmult_p_N89/XORG ;
  wire Mmult_p_inst_lut4_15;
  wire Mmult_p_inst_cy_16;
  wire \Mmult_p_N89/CYINIT ;
  wire Mmult_p_inst_multand_18;
  wire N1238;
  wire \Mmult_p_N99/XORF ;
  wire \Mmult_p_N99/XORG ;
  wire Mmult_p_inst_lut4_16;
  wire Mmult_p_inst_cy_18;
  wire \Mmult_p_N99/CYINIT ;
  wire Mmult_p_inst_multand_20;
  wire Mmult_p_inst_lut2_2;
  wire \Mmult_p_N114/CYMUXG ;
  wire Mmult_p_inst_multand_21;
  wire \Mmult_p_N114/XORG ;
  wire Mmult_p_inst_lut4_18;
  wire Mmult_p_inst_cy_20;
  wire \Mmult_p_N114/LOGIC_ZERO ;
  wire Mmult_p_inst_multand_22;
  wire Mmult_p_inst_lut4_19;
  wire \Mmult_p_N119/XORF ;
  wire \Mmult_p_N119/CYMUXG ;
  wire Mmult_p_inst_multand_23;
  wire \Mmult_p_N119/XORG ;
  wire Mmult_p_inst_lut4_20;
  wire Mmult_p_inst_cy_22;
  wire \Mmult_p_N119/CYINIT ;
  wire Mmult_p_inst_multand_24;
  wire Mmult_p_inst_lut4_21;
  wire \Mmult_p_N129/XORF ;
  wire \Mmult_p_N129/CYMUXG ;
  wire Mmult_p_inst_multand_25;
  wire \Mmult_p_N129/XORG ;
  wire Mmult_p_inst_lut4_22;
  wire Mmult_p_inst_cy_24;
  wire \Mmult_p_N129/CYINIT ;
  wire Mmult_p_inst_multand_26;
  wire Mmult_p_inst_lut4_23;
  wire \Mmult_p_N139/XORF ;
  wire \Mmult_p_N139/CYMUXG ;
  wire Mmult_p_inst_multand_27;
  wire \Mmult_p_N139/XORG ;
  wire Mmult_p_inst_lut4_24;
  wire Mmult_p_inst_cy_26;
  wire \Mmult_p_N139/CYINIT ;
  wire Mmult_p_inst_multand_28;
  wire N1240;
  wire \Mmult_p_N149/XORF ;
  wire \Mmult_p_N149/XORG ;
  wire Mmult_p_inst_lut4_25;
  wire Mmult_p_inst_cy_28;
  wire \Mmult_p_N149/CYINIT ;
  wire Mmult_p_inst_multand_30;
  wire Mmult_p_inst_lut2_3;
  wire \Mmult_p_N161/XORF ;
  wire \Mmult_p_N161/CYMUXG ;
  wire Mmult_p_inst_multand_31;
  wire \Mmult_p_N161/XORG ;
  wire Mmult_p_inst_lut4_27;
  wire Mmult_p_inst_cy_30;
  wire \Mmult_p_N161/CYINIT ;
  wire \Mmult_p_N161/LOGIC_ONE ;
  wire Mmult_p_inst_multand_32;
  wire Mmult_p_inst_lut4_28;
  wire \Mmult_p_N171/XORF ;
  wire \Mmult_p_N171/CYMUXG ;
  wire Mmult_p_inst_multand_33;
  wire \Mmult_p_N171/XORG ;
  wire Mmult_p_inst_lut4_29;
  wire Mmult_p_inst_cy_32;
  wire \Mmult_p_N171/CYINIT ;
  wire Mmult_p_inst_multand_34;
  wire Mmult_p_inst_lut4_30;
  wire \Mmult_p_N181/XORF ;
  wire \Mmult_p_N181/CYMUXG ;
  wire Mmult_p_inst_multand_35;
  wire \Mmult_p_N181/XORG ;
  wire Mmult_p_inst_lut4_31;
  wire Mmult_p_inst_cy_34;
  wire \Mmult_p_N181/CYINIT ;
  wire Mmult_p_inst_multand_36;
  wire Mmult_p_inst_lut4_32;
  wire \Mmult_p_N191/XORF ;
  wire \Mmult_p_N191/CYMUXG ;
  wire Mmult_p_inst_multand_37;
  wire \Mmult_p_N191/XORG ;
  wire Mmult_p_inst_lut4_33;
  wire Mmult_p_inst_cy_36;
  wire \Mmult_p_N191/CYINIT ;
  wire Mmult_p_inst_multand_38;
  wire N1242;
  wire \Mmult_p_N201/XORF ;
  wire \Mmult_p_N201/XORG ;
  wire Mmult_p_inst_lut4_34;
  wire Mmult_p_inst_cy_38;
  wire \Mmult_p_N201/CYINIT ;
  wire \Mmult_p_inst_lut2_4/FROM ;
  wire \Mmult_p_inst_lut2_4/CYMUXG ;
  wire \Mmult_p_inst_lut2_4/XORG ;
  wire Mmult_p_inst_lut2_5;
  wire Mmult_p_inst_cy_39;
  wire \Mmult_p_inst_lut2_4/LOGIC_ZERO ;
  wire Mmult_p_inst_lut2_6;
  wire \Mmult_p_N209/XORF ;
  wire \Mmult_p_N209/CYMUXG ;
  wire \Mmult_p_N209/XORG ;
  wire Mmult_p_inst_lut2_7;
  wire Mmult_p_inst_cy_41;
  wire \Mmult_p_N209/CYINIT ;
  wire Mmult_p_inst_lut2_8;
  wire \Mmult_p_N211/XORF ;
  wire \Mmult_p_N211/CYMUXG ;
  wire \Mmult_p_N211/XORG ;
  wire Mmult_p_inst_lut2_9;
  wire Mmult_p_inst_cy_43;
  wire \Mmult_p_N211/CYINIT ;
  wire Mmult_p_inst_lut2_10;
  wire \Mmult_p_N213/XORF ;
  wire \Mmult_p_N213/CYMUXG ;
  wire \Mmult_p_N213/XORG ;
  wire Mmult_p_inst_lut2_11;
  wire Mmult_p_inst_cy_45;
  wire \Mmult_p_N213/CYINIT ;
  wire Mmult_p_inst_lut2_12;
  wire \Mmult_p_N215/XORF ;
  wire \Mmult_p_N215/XORG ;
  wire Mmult_p_inst_lut2_13;
  wire Mmult_p_inst_cy_47;
  wire \Mmult_p_N215/CYINIT ;
  wire Mmult_p_inst_lut2_14;
  wire \Mmult_p_N263/CYMUXG ;
  wire \Mmult_p_N263/XORG ;
  wire Mmult_p_inst_lut2_15;
  wire Mmult_p_inst_cy_48;
  wire \Mmult_p_N263/LOGIC_ZERO ;
  wire Mmult_p_inst_lut2_16;
  wire \Mmult_p_N264/XORF ;
  wire \Mmult_p_N264/CYMUXG ;
  wire \Mmult_p_N264/XORG ;
  wire Mmult_p_inst_lut2_17;
  wire Mmult_p_inst_cy_50;
  wire \Mmult_p_N264/CYINIT ;
  wire Mmult_p_inst_lut2_18;
  wire \Mmult_p_N266/XORF ;
  wire \Mmult_p_N266/CYMUXG ;
  wire \Mmult_p_N266/XORG ;
  wire Mmult_p_inst_lut2_19;
  wire Mmult_p_inst_cy_52;
  wire \Mmult_p_N266/CYINIT ;
  wire Mmult_p_inst_lut2_20;
  wire \Mmult_p_N268/XORF ;
  wire \Mmult_p_N268/CYMUXG ;
  wire \Mmult_p_N268/XORG ;
  wire Mmult_p_inst_lut2_21;
  wire Mmult_p_inst_cy_54;
  wire \Mmult_p_N268/CYINIT ;
  wire Mmult_p_inst_lut2_22;
  wire \Mmult_p_N270/XORF ;
  wire \Mmult_p_N270/XORG ;
  wire Mmult_p_inst_lut2_23;
  wire Mmult_p_inst_cy_56;
  wire \Mmult_p_N270/CYINIT ;
  wire \Mmult_p_inst_lut2_24/FROM ;
  wire \Mmult_p_inst_lut2_24/CYMUXG ;
  wire \Mmult_p_inst_lut2_24/XORG ;
  wire Mmult_p_inst_lut2_25;
  wire Mmult_p_inst_cy_57;
  wire \Mmult_p_inst_lut2_24/LOGIC_ZERO ;
  wire Mmult_p_inst_lut2_26;
  wire \p_6_OBUF/XORF ;
  wire \p_6_OBUF/CYMUXG ;
  wire \p_6_OBUF/XORG ;
  wire Mmult_p_inst_lut2_27;
  wire Mmult_p_inst_cy_59;
  wire \p_6_OBUF/CYINIT ;
  wire Mmult_p_inst_lut2_28;
  wire \p_8_OBUF/XORF ;
  wire \p_8_OBUF/CYMUXG ;
  wire \p_8_OBUF/XORG ;
  wire Mmult_p_inst_lut2_29;
  wire Mmult_p_inst_cy_61;
  wire \p_8_OBUF/CYINIT ;
  wire Mmult_p_inst_lut2_30;
  wire \p_10_OBUF/XORF ;
  wire \p_10_OBUF/CYMUXG ;
  wire \p_10_OBUF/XORG ;
  wire Mmult_p_inst_lut2_31;
  wire Mmult_p_inst_cy_63;
  wire \p_10_OBUF/CYINIT ;
  wire Mmult_p_inst_lut2_32;
  wire \p_12_OBUF/XORF ;
  wire \p_12_OBUF/CYMUXG ;
  wire \p_12_OBUF/XORG ;
  wire Mmult_p_inst_lut2_33;
  wire Mmult_p_inst_cy_65;
  wire \p_12_OBUF/CYINIT ;
  wire Mmult_p_inst_lut2_34;
  wire \p_14_OBUF/XORF ;
  wire \p_14_OBUF/XORG ;
  wire Mmult_p_inst_lut2_35;
  wire Mmult_p_inst_cy_67;
  wire \p_14_OBUF/CYINIT ;
  wire Mmult_p_inst_multand_0;
  wire \Mmult_p_inst_lut2_0/FROM ;
  wire \Mmult_p_inst_lut2_0/CYMUXG ;
  wire Mmult_p_inst_multand_1;
  wire \Mmult_p_inst_lut2_0/XORG ;
  wire Mmult_p_inst_lut4_0;
  wire Mmult_p_inst_cy_0;
  wire \Mmult_p_inst_lut2_0/LOGIC_ZERO ;
  wire Mmult_p_inst_multand_2;
  wire Mmult_p_inst_lut4_1;
  wire \Mmult_p_N19/XORF ;
  wire \Mmult_p_N19/CYMUXG ;
  wire Mmult_p_inst_multand_3;
  wire \Mmult_p_N19/XORG ;
  wire Mmult_p_inst_lut4_2;
  wire Mmult_p_inst_cy_2;
  wire \Mmult_p_N19/CYINIT ;
  wire Mmult_p_inst_multand_4;
  wire Mmult_p_inst_lut4_3;
  wire \Mmult_p_N29/XORF ;
  wire \Mmult_p_N29/CYMUXG ;
  wire Mmult_p_inst_multand_5;
  wire \Mmult_p_N29/XORG ;
  wire Mmult_p_inst_lut4_4;
  wire Mmult_p_inst_cy_4;
  wire \Mmult_p_N29/CYINIT ;
  wire Mmult_p_inst_multand_6;
  wire Mmult_p_inst_lut4_5;
  wire \Mmult_p_N39/XORF ;
  wire \Mmult_p_N39/CYMUXG ;
  wire Mmult_p_inst_multand_7;
  wire \Mmult_p_N39/XORG ;
  wire Mmult_p_inst_lut4_6;
  wire Mmult_p_inst_cy_6;
  wire \Mmult_p_N39/CYINIT ;
  wire Mmult_p_inst_multand_8;
  wire N1236;
  wire \Mmult_p_N49/XORF ;
  wire \Mmult_p_N49/XORG ;
  wire Mmult_p_inst_lut4_7;
  wire Mmult_p_inst_cy_8;
  wire \Mmult_p_N49/CYINIT ;
  wire VCC;
  initial $sdf_annotate("mult_s_timesim.sdf");
  X_OPAD \p<10>/PAD  (
    .PAD(p[10])
  );
  X_TRI p_10_OBUF_0 (
    .I(\p<10>/OUTMUX ),
    .CTL(\p<10>/ENABLE ),
    .O(p[10])
  );
  X_INV \p<10>/ENABLEINV  (
    .I(\p<10>/TORGTS ),
    .O(\p<10>/ENABLE )
  );
  X_BUF \p<10>/GTS_OR  (
    .I(GTS),
    .O(\p<10>/TORGTS )
  );
  X_BUF \p<10>/OUTMUX_1  (
    .I(p_10_OBUF),
    .O(\p<10>/OUTMUX )
  );
  X_OPAD \p<11>/PAD  (
    .PAD(p[11])
  );
  X_TRI p_11_OBUF_2 (
    .I(\p<11>/OUTMUX ),
    .CTL(\p<11>/ENABLE ),
    .O(p[11])
  );
  X_INV \p<11>/ENABLEINV  (
    .I(\p<11>/TORGTS ),
    .O(\p<11>/ENABLE )
  );
  X_BUF \p<11>/GTS_OR  (
    .I(GTS),
    .O(\p<11>/TORGTS )
  );
  X_BUF \p<11>/OUTMUX_3  (
    .I(p_11_OBUF),
    .O(\p<11>/OUTMUX )
  );
  X_OPAD \p<12>/PAD  (
    .PAD(p[12])
  );
  X_TRI p_12_OBUF_4 (
    .I(\p<12>/OUTMUX ),
    .CTL(\p<12>/ENABLE ),
    .O(p[12])
  );
  X_INV \p<12>/ENABLEINV  (
    .I(\p<12>/TORGTS ),
    .O(\p<12>/ENABLE )
  );
  X_BUF \p<12>/GTS_OR  (
    .I(GTS),
    .O(\p<12>/TORGTS )
  );
  X_BUF \p<12>/OUTMUX_5  (
    .I(p_12_OBUF),
    .O(\p<12>/OUTMUX )
  );
  X_OPAD \p<13>/PAD  (
    .PAD(p[13])
  );
  X_TRI p_13_OBUF_6 (
    .I(\p<13>/OUTMUX ),
    .CTL(\p<13>/ENABLE ),
    .O(p[13])
  );
  X_INV \p<13>/ENABLEINV  (
    .I(\p<13>/TORGTS ),
    .O(\p<13>/ENABLE )
  );
  X_BUF \p<13>/GTS_OR  (
    .I(GTS),
    .O(\p<13>/TORGTS )
  );
  X_BUF \p<13>/OUTMUX_7  (
    .I(p_13_OBUF),
    .O(\p<13>/OUTMUX )
  );