i8051_all.map.rpt

来自「8051的vhdl源代码」· RPT 代码 · 共 610 行 · 第 1/5 页

; BYTE_SIZE                          ; 8                    ; Untyped                    ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; INIT_FILE                          ; I8051_ALL0.rtl.mif   ; Untyped                    ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                    ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                    ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                    ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                    ;
; ENABLE_ECC                         ; FALSE                ; Untyped                    ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                    ;
; CBXI_PARAMETER                     ; altsyncram_pnu       ; Untyped                    ;
+------------------------------------+----------------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: I8051_ALU:U_ALU|lpm_mult:Mult0   ;
+------------------------------------------------+------------+---------------------+
; Parameter Name                                 ; Value      ; Type                ;
+------------------------------------------------+------------+---------------------+
; AUTO_CARRY_CHAINS                              ; ON         ; AUTO_CARRY          ;
; IGNORE_CARRY_BUFFERS                           ; OFF        ; IGNORE_CARRY        ;
; AUTO_CASCADE_CHAINS                            ; ON         ; AUTO_CASCADE        ;
; IGNORE_CASCADE_BUFFERS                         ; OFF        ; IGNORE_CASCADE      ;
; LPM_WIDTHA                                     ; 8          ; Untyped             ;
; LPM_WIDTHB                                     ; 8          ; Untyped             ;
; LPM_WIDTHP                                     ; 16         ; Untyped             ;
; LPM_WIDTHR                                     ; 16         ; Untyped             ;
; LPM_WIDTHS                                     ; 1          ; Untyped             ;
; LPM_REPRESENTATION                             ; UNSIGNED   ; Untyped             ;
; LPM_PIPELINE                                   ; 0          ; Untyped             ;
; LATENCY                                        ; 0          ; Untyped             ;
; INPUT_A_IS_CONSTANT                            ; NO         ; Untyped             ;
; INPUT_B_IS_CONSTANT                            ; NO         ; Untyped             ;
; USE_EAB                                        ; OFF        ; Untyped             ;
; MAXIMIZE_SPEED                                 ; 5          ; Untyped             ;
; DEVICE_FAMILY                                  ; Cyclone II ; Untyped             ;
; CARRY_CHAIN                                    ; MANUAL     ; Untyped             ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT        ; TECH_MAPPER_APEX20K ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO       ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0          ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0          ; Untyped             ;
; CBXI_PARAMETER                                 ; mult_cs01  ; Untyped             ;
; INPUT_A_FIXED_VALUE                            ; Bx         ; Untyped             ;
; INPUT_B_FIXED_VALUE                            ; Bx         ; Untyped             ;
; USE_AHDL_IMPLEMENTATION                        ; OFF        ; Untyped             ;
+------------------------------------------------+------------+---------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance                         ;
+---------------------------------------+--------------------------------+
; Name                                  ; Value                          ;
+---------------------------------------+--------------------------------+
; Number of entity instances            ; 1                              ;
; Entity Instance                       ; I8051_ALU:U_ALU|lpm_mult:Mult0 ;
;     -- LPM_WIDTHA                     ; 8                              ;
;     -- LPM_WIDTHB                     ; 8                              ;
;     -- LPM_WIDTHP                     ; 16                             ;
;     -- LPM_REPRESENTATION             ; UNSIGNED                       ;
;     -- INPUT_A_IS_CONSTANT            ; NO                             ;
;     -- INPUT_B_IS_CONSTANT            ; NO                             ;
;     -- USE_EAB                        ; OFF                            ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                           ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                             ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                             ;
+---------------------------------------+--------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
    Info: Processing started: Fri Jun 06 09:57:15 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off i8051_all -c i8051_all
Info: Found 1 design units, including 0 entities, in source file C:/altera/71/quartus/libraries/vhdl/work/i8051_lib.vhd
    Info: Found design unit 1: I8051_LIB
Info: Found 2 design units, including 1 entities, in source file i8051_all.vhd
    Info: Found design unit 1: I8051_ALL-STR
    Info: Found entity 1: I8051_ALL
Info: Elaborating entity "i8051_all" for the top level hierarchy
Warning: Using design file I8051_ALU.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_ALU-BHV
    Info: Found entity 1: I8051_ALU
Info: Elaborating entity "I8051_ALU" for hierarchy "I8051_ALU:U_ALU"
Warning: Using design file I8051_DEC.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_DEC-DFL
    Info: Found entity 1: I8051_DEC
Info: Elaborating entity "I8051_DEC" for hierarchy "I8051_DEC:U_DEC"
Warning: Using design file I8051_RAM.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_RAM-BHV
    Info: Found entity 1: I8051_RAM
Info: Elaborating entity "I8051_RAM" for hierarchy "I8051_RAM:U_RAM"
Warning: Using design file I8051_ROM.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_ROM-BHV
    Info: Found entity 1: I8051_ROM
Info: Elaborating entity "I8051_ROM" for hierarchy "I8051_ROM:U_ROM"
Warning: Using design file I8051_CTR.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_CTR-BHV
    Info: Found entity 1: I8051_CTR
Info: Elaborating entity "I8051_CTR" for hierarchy "I8051_CTR:U_CTR"
Warning: Using design file I8051_DBG.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: I8051_DBG-BHV
    Info: Found entity 1: I8051_DBG
Info: Elaborating entity "I8051_DBG" for hierarchy "I8051_DBG:U_DBG"
Warning (10036): Verilog HDL or VHDL warning at I8051_DBG.vhd(145): object "opc" assigned a value but never read
Info: State machine "|I8051_ALL|I8051_CTR:U_CTR|exe_state" contains 8 states
Info: State machine "|I8051_ALL|I8051_CTR:U_CTR|cpu_state" contains 4 states
Info: Selected Auto state machine encoding method for state machine "|I8051_ALL|I8051_CTR:U_CTR|exe_state"
Info: Encoding result for state machine "|I8051_ALL|I8051_CTR:U_CTR|exe_state"
    Info: Completed encoding using 8 state bits
        Info: Encoded state bit "I8051_CTR:U_CTR|exe_state.es_7"
        Info: Encoded state bit "I8051_CTR:U_CTR|exe_state.es_6"