i8051_all.xml

8051的vhdl源代码

<interfaceDefinition version='1.1' language='vhdl' kind='component' name='i8051_all'>
  <useClause path='work.i8051_lib.all' />
  <useClause path='ieee.std_logic_arith.all' />
  <useClause path='ieee.std_logic_1164.all' />
    <portList>

      <port name='rst' direction='in' type='std_logic' />
      <port name='clk' direction='in' type='std_logic' />
      <port name='xrm_addr' direction='out' type='unsigned (15 downto 0)' />
      <port name='xrm_out_data' direction='out' type='unsigned (7 downto 0)' />
      <port name='xrm_in_data' direction='in' type='unsigned (7 downto 0)' />
      <port name='xrm_rd' direction='out' type='std_logic' />
      <port name='xrm_wr' direction='out' type='std_logic' />
      <port name='p0_in' direction='in' type='unsigned (7 downto 0)' />
      <port name='p0_out' direction='out' type='unsigned (7 downto 0)' />
      <port name='p1_in' direction='in' type='unsigned (7 downto 0)' />
      <port name='p1_out' direction='out' type='unsigned (7 downto 0)' />
      <port name='p2_in' direction='in' type='unsigned (7 downto 0)' />
      <port name='p2_out' direction='out' type='unsigned (7 downto 0)' />
      <port name='p3_in' direction='in' type='unsigned (7 downto 0)' />
      <port name='p3_out' direction='out' type='unsigned (7 downto 0)' />

    </portList>
</interfaceDefinition>