testlatch.fit.eqn

用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。

--D1_T_CLK is JTAGcore:inst4|shiftout:shifter|T_CLK at LC2
D1_T_CLK_p1_out = !B1_ByteLoad & !N_PWREN & D1_rdy;
D1_T_CLK_p2_out = !D1_bitcount[3] & !D1_bitcount[2] & !D1_bitcount[1] & !D1_bitcount[0] & !D1_T_CLK;
D1_T_CLK_p3_out = N_PWREN & !D1_T_CLK;
D1_T_CLK_p4_out = D1_rdy & !D1_T_CLK;
D1_T_CLK_or_out = D1_T_CLK_p1_out # D1_T_CLK_p2_out # D1_T_CLK_p3_out # D1_T_CLK_p4_out;
D1_T_CLK_reg_input = !D1_T_CLK_or_out;
D1_T_CLK = TFFE(D1_T_CLK_reg_input, GLOBAL(CLK), , , );


--B1_RD is JTAGcore:inst4|RD at LC19
B1_RD_p0_out = B1L81Q & !B1L91Q & !B1L02Q & A1L81;
B1_RD_p1_out = !B1L81Q & B1L91Q & !D1_rdy;
B1_RD_p2_out = !B1L81Q & B1L91Q & !B1L02Q;
B1_RD_p3_out = B1L81Q & !B1L91Q & !B1L02Q & !A1L02 & A1L12;
B1_RD_or_out = B1L42 # B1_RD_p0_out # B1_RD_p1_out # B1_RD_p2_out # B1_RD_p3_out;
B1_RD_reg_input = B1_RD_or_out;
B1_RD = DFFE(B1_RD_reg_input, GLOBAL(CLK), , !N_PWREN, );


--B1L01 is JTAGcore:inst4|JTCK~9 at LC53
B1L01_p1_out = !B1_direct & B1_R_JTCK;
B1L01_p2_out = B1_direct & D1_T_CLK;
B1L01_or_out = B1L01_p1_out # B1L01_p2_out;
B1L01 = B1L01_or_out;


--D1_shifter[6] is JTAGcore:inst4|shiftout:shifter|shifter[6] at LC21
D1_shifter[6]_p1_out = D1_shifter[7] & D1_T_CLK & !N_PWREN & !D1_rdy & !D1_shifter[6];
D1_shifter[6]_p2_out = !N_PWREN & D1_rdy & !D1_shifter[6] & A1L91 & B1_ByteLoad;
D1_shifter[6]_p3_out = !D1_shifter[7] & D1_T_CLK & !N_PWREN & !D1_rdy & D1_shifter[6];
D1_shifter[6]_p4_out = !N_PWREN & D1_rdy & D1_shifter[6] & !A1L91 & B1_ByteLoad;
D1_shifter[6]_or_out = D1_shifter[6]_p1_out # D1_shifter[6]_p2_out # D1_shifter[6]_p3_out # D1_shifter[6]_p4_out;
D1_shifter[6]_reg_input = D1_shifter[6]_or_out;
D1_shifter[6] = TFFE(D1_shifter[6]_reg_input, GLOBAL(CLK), , , );


--B1_echo is JTAGcore:inst4|echo at LC57
B1_echo_or_out = !A1L91;
B1_echo_reg_input = B1_echo_or_out;
B1_echo_p3_out = !B1L02Q & B1L81Q & !B1L91Q;
B1_echo = DFFE(B1_echo_reg_input, GLOBAL(CLK), , !N_PWREN, B1_echo_p3_out);


--B1L12 is JTAGcore:inst4|SM~980 at LC22
B1L12_p1_out = !B1_ByteCounter[5] & !B1_ByteCounter[4] & !B1_ByteCounter[3] & !B1_ByteCounter[2] & !B1_ByteCounter[1] & !B1_ByteCounter[0] & B1L81Q & B1L91Q;
B1L12_p2_out = B1L02Q & B1L81Q & !B1L91Q & !B1_echo;
B1L12_p3_out = !D1_rdy & B1L02Q & B1L81Q & !B1L91Q;
B1L12_p4_out = !D1_rdy & !B1L81Q & B1L91Q;
B1L12 = B1L12_p1_out # B1L12_p2_out # B1L12_p3_out # B1L12_p4_out;


--B1L22 is JTAGcore:inst4|SM~985 at LC31
B1L22_p1_out = !N_TXE & B1L02Q & !B1L91Q & !B1L81Q;
B1L22_p2_out = !B1L02Q & !B1L91Q & !B1L81Q & !N_RXF;
B1L22_p3_out = B1L02Q & B1L91Q & !B1L81Q & !D1_rdy;
B1L22_p4_out = !B1L02Q & !B1L91Q & B1L81Q & A1L02 & !A1L81;
B1L22 = B1L22_p1_out # B1L22_p2_out # B1L22_p3_out # B1L22_p4_out;


--B1L32 is JTAGcore:inst4|SM~990 at LC27
B1L32_p1_out = !B1_ByteCounter[5] & !B1_ByteCounter[4] & !B1_ByteCounter[3] & !B1_ByteCounter[2] & !B1_ByteCounter[1] & !B1_ByteCounter[0] & !B1L02Q & B1L81Q;
B1L32_p2_out = !B1L02Q & B1L81Q & N_RXF;
B1L32 = B1L32_p1_out # B1L32_p2_out;


--B1L42 is JTAGcore:inst4|Select~1951 at LC18
B1L42_p1_out = !B1_ByteCounter[5] & !B1_ByteCounter[4] & !B1_ByteCounter[3] & !B1_ByteCounter[2] & !B1_ByteCounter[1] & !B1_ByteCounter[0] & B1_RD & B1L81Q;
B1L42_p2_out = B1_RD & B1L81Q & !B1L91Q;
B1L42_p3_out = B1_RD & B1L02Q;
B1L42_p4_out = B1_RD & N_RXF;
B1L42 = B1L42_p1_out # B1L42_p2_out # B1L42_p3_out # B1L42_p4_out;


--N_PWREN is N_PWREN at PIN_20
--operation mode is input

N_PWREN = INPUT();


--N_TXE is N_TXE at PIN_18
--operation mode is input

N_TXE = INPUT();


--N_RXF is N_RXF at PIN_19
--operation mode is input

N_RXF = INPUT();


--CLK is CLK at PIN_40
--operation mode is input

CLK = INPUT();


--CDONE is CDONE at PIN_28
--operation mode is input

CDONE = INPUT();


--DATAOUT is DATAOUT at PIN_23
--operation mode is input

DATAOUT = INPUT();


--CFG0 is CFG0 at PIN_39
--operation mode is input

CFG0 = INPUT();


--CFG2 is CFG2 at PIN_37
--operation mode is input

CFG2 = INPUT();


--CFG1 is CFG1 at PIN_38
--operation mode is input

CFG1 = INPUT();


--CFG3 is CFG3 at PIN_35
--operation mode is input

CFG3 = INPUT();


--A1L81 is D~0 at PIN_13
--operation mode is bidir

A1L81 = D[7];

--D[7] is D[7] at PIN_13
--operation mode is bidir

D[7]_tri_out = TRI(D1_shifter[7], B1_WR);
D[7] = BIDIR(D[7]_tri_out);


--A1L91 is D~1 at PIN_12
--operation mode is bidir

A1L91 = D[6];

--D[6] is D[6] at PIN_12
--operation mode is bidir

D[6]_tri_out = TRI(D1_shifter[6], B1_WR);
D[6] = BIDIR(D[6]_tri_out);


--A1L02 is D~2 at PIN_10
--operation mode is bidir

A1L02 = D[5];

--D[5] is D[5] at PIN_10
--operation mode is bidir

D[5]_tri_out = TRI(D1_shifter[5], B1_WR);
D[5] = BIDIR(D[5]_tri_out);


--A1L12 is D~3 at PIN_8
--operation mode is bidir

A1L12 = D[4];

--D[4] is D[4] at PIN_8
--operation mode is bidir

D[4]_tri_out = TRI(D1_shifter[4], B1_WR);
D[4] = BIDIR(D[4]_tri_out);


--A1L22 is D~4 at PIN_6
--operation mode is bidir

A1L22 = D[3];

--D[3] is D[3] at PIN_6
--operation mode is bidir

D[3]_tri_out = TRI(D1_shifter[3], B1_WR);
D[3] = BIDIR(D[3]_tri_out);


--A1L32 is D~5 at PIN_5
--operation mode is bidir

A1L32 = D[2];

--D[2] is D[2] at PIN_5
--operation mode is bidir

D[2]_tri_out = TRI(D1_shifter[2], B1_WR);
D[2] = BIDIR(D[2]_tri_out);


--A1L42 is D~6 at PIN_3
--operation mode is bidir

A1L42 = D[1];

--D[1] is D[1] at PIN_3
--operation mode is bidir

D[1]_tri_out = TRI(B1L62, B1_WR);
D[1] = BIDIR(D[1]_tri_out);


--A1L52 is D~7 at PIN_2
--operation mode is bidir

A1L52 = D[0];

--D[0] is D[0] at PIN_2
--operation mode is bidir

D[0]_tri_out = TRI(B1L52, B1_WR);
D[0] = BIDIR(D[0]_tri_out);


--pin_44_OUT is pin_44_OUT at PIN_44
--operation mode is output

pin_44_OUT = OUTPUT(A1L72);


--WR is WR at PIN_15
--operation mode is output

WR = OUTPUT(B1_WR);


--RED_LED is RED_LED at PIN_34
--operation mode is output

RED_LED = OUTPUT(B1_RED_LED);


--N_CE is N_CE at PIN_25
--operation mode is output

N_CE = OUTPUT(B1_N_CE);


--N_CONF is N_CONF at PIN_27
--operation mode is output

N_CONF = OUTPUT(B1_N_CONF);


--N_CS is N_CS at PIN_22
--operation mode is output

N_CS = OUTPUT(B1_N_CS);


--ASDI is ASDI at PIN_21
--operation mode is output

ASDI = OUTPUT(B1L1);


--N_RD is N_RD at PIN_14
--operation mode is output

N_RD = OUTPUT(B1_RD);


--JTCK is JTCK at PIN_31
--operation mode is output

JTCK = OUTPUT(B1L01);


--GREEN_LED is GREEN_LED at PIN_33
--operation mode is output

GREEN_LED = OUTPUT(B1_echo);