clk_100div.bld

应用VHDL语言将高稳晶振分频得到1pps

Release 7.1i ngdbuild H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd c:\1pps/_ngo -i -p xc3s50-pq208-5
clk_100div.ngc clk_100div.ngd 

Reading NGO file 'C:/1PPS/clk_100div.ngc' ...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 62648 kilobytes

Writing NGD file "clk_100div.ngd" ...

Writing NGDBUILD log file "clk_100div.bld"...