📄 dvf.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 08/19/2008 15:13:47
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "dvf"
BEGIN
DEVICE = "EPM7032LC44-6";
"CLK" : INPUT_PIN = 43 ;
"D0" : INPUT_PIN = 12 ; -- LC8
"D1" : INPUT_PIN = 11 ; -- LC7
"D2" : INPUT_PIN = 9 ; -- LC6
"D3" : INPUT_PIN = 8 ; -- LC5
"D4" : INPUT_PIN = 7 ; -- LC4
"D5" : INPUT_PIN = 6 ; -- LC3
"D6" : INPUT_PIN = 5 ; -- LC2
"D7" : INPUT_PIN = 4 ; -- LC1
"FOUT" : OUTPUT_PIN = 13 ; -- LC9
"|LPM_ADD_SUB:67|addcore:adder|result_node2" : LOCATION = LC31 ; -- PIN 25
"|LPM_ADD_SUB:67|addcore:adder|result_node3" : LOCATION = LC30 ; -- PIN 26
"|LPM_ADD_SUB:67|addcore:adder|result_node4" : LOCATION = LC28 ; -- PIN 28
"|LPM_ADD_SUB:67|addcore:adder|result_node5" : LOCATION = LC27 ; -- PIN 29
"|LPM_ADD_SUB:67|addcore:adder|result_node6" : LOCATION = LC26 ; -- PIN 31
"|LPM_ADD_SUB:67|addcore:adder|result_node7" : LOCATION = LC29 ; -- PIN 27
":12" : LOCATION = LC25 ; -- PIN 32 -- FULL
":13" : LOCATION = LC24 ; -- PIN 33 -- CNT87
":14" : LOCATION = LC17 ; -- PIN 41 -- CNT86
":15" : LOCATION = LC18 ; -- PIN 40 -- CNT85
":16" : LOCATION = LC19 ; -- PIN 39 -- CNT84
":17" : LOCATION = LC20 ; -- PIN 38 -- CNT83
":18" : LOCATION = LC21 ; -- PIN 37 -- CNT82
":19" : LOCATION = LC22 ; -- PIN 36 -- CNT81
":20" : LOCATION = LC23 ; -- PIN 34 -- CNT80
":153" : LOCATION = LC4 ; -- PIN 7 -- CNT2
END;
INTERNAL_INFO "dvf"
BEGIN
DEVICE = EPM7032LC44-6;
LC9 : LORAX = "G34R0,PA19R0C0";
LC4 : LORAX = "G12R0,PA0R0C0";
LC25 : LORAX = "G38R0,PA18R0C0";
LC24 : LORAX = "G33R0,PA10R0C1";
OH0R0P4 : LORAX = "G43R0,PA23R0C1";
LC17 : LORAX = "G13R0,PA7R0C1";
OH1R0P5 : LORAX = "G44R0,PA19R0C1";
LC18 : LORAX = "G14R0,PA5R0C1";
OH2R0P6 : LORAX = "G45R0,PA25R0C1";
LC19 : LORAX = "G15R0,PA3R0C1";
OH3R0P7 : LORAX = "G46R0,PA20R0C1";
LC20 : LORAX = "G16R0,PA1R0C1";
OH4R0P8 : LORAX = "G60R0,PA29R0C1";
LC21 : LORAX = "G30R0,PA16R0C1";
OH5R0P9 : LORAX = "G61R0,PA30R0C1";
LC22 : LORAX = "G31R0,PA14R0C1";
OH6R0P11 : LORAX = "G62R0,PA31R0C1";
LC23 : LORAX = "G32R0,PA12R0C1";
OH7R0P12 : LORAX = "G63R0,PA33R0C1";
LC31 : LORAX = "G57R0,PA28R0C1";
LC30 : LORAX = "G56R0,PA34R0C1";
LC28 : LORAX = "G41R0,PA22R0C1,PA20R0C0";
LC27 : LORAX = "G40R0,PA24R0C1";
LC26 : LORAX = "G39R0,PA21R0C1";
LC29 : LORAX = "G55R0,PA27R0C1";
END;
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