rom.tan.qmsg

来自「我用VHDL写的正弦」· QMSG 代码 · 共 7 行 · 第 1/5 页

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\] memory sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8 152.63 MHz 6.552 ns Internal " "Info: Clock \"clk\" has Internal fmax of 152.63 MHz between source register \"sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\]\" and destination memory \"sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8\" (period= 6.552 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.292 ns + Longest register memory " "Info: + Longest register to memory delay is 6.292 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\] 1 REG LCFF_X26_Y6_N7 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X26_Y6_N7; Fanout = 6; REG Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 88 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.481 ns) + CELL(0.621 ns) 1.102 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita0~COUT 2 COMB LCCOMB_X26_Y6_N6 2 " "Info: 2: + IC(0.481 ns) + CELL(0.621 ns) = 1.102 ns; Loc. = LCCOMB_X26_Y6_N6; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita0~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.102 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 36 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.188 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita1~COUT 3 COMB LCCOMB_X26_Y6_N8 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 1.188 ns; Loc. = LCCOMB_X26_Y6_N8; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita1~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 41 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.274 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita2~COUT 4 COMB LCCOMB_X26_Y6_N10 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 1.274 ns; Loc. = LCCOMB_X26_Y6_N10; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita2~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 46 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.360 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita3~COUT 5 COMB LCCOMB_X26_Y6_N12 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 1.360 ns; Loc. = LCCOMB_X26_Y6_N12; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita3~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 51 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 1.550 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita4~COUT 6 COMB LCCOMB_X26_Y6_N14 2 " "Info: 6: + IC(0.000 ns) + CELL(0.190 ns) = 1.550 ns; Loc. = LCCOMB_X26_Y6_N14; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita4~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.190 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 56 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.636 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita5~COUT 7 COMB LCCOMB_X26_Y6_N16 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 1.636 ns; Loc. = LCCOMB_X26_Y6_N16; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita5~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 61 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.722 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita6~COUT 8 COMB LCCOMB_X26_Y6_N18 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 1.722 ns; Loc. = LCCOMB_X26_Y6_N18; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita6~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 66 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.808 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita7~COUT 9 COMB LCCOMB_X26_Y6_N20 2 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 1.808 ns; Loc. = LCCOMB_X26_Y6_N20; Fanout = 2; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita7~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 71 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.894 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita8~COUT 10 COMB LCCOMB_X26_Y6_N22 1 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 1.894 ns; Loc. = LCCOMB_X26_Y6_N22; Fanout = 1; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita8~COUT'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.086 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 76 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 2.400 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita8~16 11 COMB LCCOMB_X26_Y6_N24 3 " "Info: 11: + IC(0.000 ns) + CELL(0.506 ns) = 2.400 ns; Loc. = LCCOMB_X26_Y6_N24; Fanout = 3; COMB Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|counter_comb_bita8~16'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.506 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 76 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.394 ns) + CELL(0.370 ns) 3.164 ns sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~113 12 COMB LCCOMB_X26_Y6_N2 3 " "Info: 12: + IC(0.394 ns) + CELL(0.370 ns) = 3.164 ns; Loc. = LCCOMB_X26_Y6_N2; Fanout = 3; COMB Node = 'sld_signaltap:rom1\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~113'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.764 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.376 ns) + CELL(0.624 ns) 4.164 ns sld_signaltap:rom1\|sld_ela_control:ela_control\|buffer_write_ena_int~43 13 COMB LCCOMB_X26_Y6_N0 32 " "Info: 13: + IC(0.376 ns) + CELL(0.624 ns) = 4.164 ns; Loc. = LCCOMB_X26_Y6_N0; Fanout = 32; COMB Node = 'sld_signaltap:rom1\|sld_ela_control:ela_control\|buffer_write_ena_int~43'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.000 ns" { sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.347 ns) + CELL(0.781 ns) 6.292 ns sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8 14 MEM M4K_X27_Y7 1 " "Info: 14: + IC(1.347 ns) + CELL(0.781 ns) = 6.292 ns; Loc. = M4K_X27_Y7; Fanout = 1; MEM Node = 'sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.128 ns" { sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "db/altsyncram_faf2.tdf" "" { Text "D:/rom/db/altsyncram_faf2.tdf" 138 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.694 ns ( 58.71 % ) " "Info: Total cell delay = 3.694 ns ( 58.71 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.598 ns ( 41.29 % ) " "Info: Total interconnect delay = 2.598 ns ( 41.29 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "6.292 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "6.292 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } { 0.000ns 0.481ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.394ns 0.376ns 1.347ns } { 0.000ns 0.621ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.624ns 0.781ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.090 ns - Smallest " "Info: - Smallest clock skew is 0.090 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.934 ns + Shortest memory " "Info: + Shortest clock path from clock \"clk\" to destination memory is 2.934 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_23 1 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_23; Fanout = 1; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { clk } "NODE_NAME" } "" } } { "rom.vhd" "" { Text "D:/rom/rom.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.269 ns clk~clkctrl 2 COMB CLKCTRL_G2 171 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.269 ns; Loc. = CLKCTRL_G2; Fanout = 171; COMB Node = 'clk~clkctrl'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "rom.vhd" "" { Text "D:/rom/rom.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.831 ns) + CELL(0.834 ns) 2.934 ns sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8 3 MEM M4K_X27_Y7 1 " "Info: 3: + IC(0.831 ns) + CELL(0.834 ns) = 2.934 ns; Loc. = M4K_X27_Y7; Fanout = 1; MEM Node = 'sld_signaltap:rom1\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_faf2:auto_generated\|ram_block1a3~porta_datain_reg8'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.665 ns" { clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "db/altsyncram_faf2.tdf" "" { Text "D:/rom/db/altsyncram_faf2.tdf" 138 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.964 ns ( 66.94 % ) " "Info: Total cell delay = 1.964 ns ( 66.94 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.970 ns ( 33.06 % ) " "Info: Total interconnect delay = 0.970 ns ( 33.06 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.934 ns" { clk clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.934 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } { 0.000ns 0.000ns 0.139ns 0.831ns } { 0.000ns 1.130ns 0.000ns 0.834ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.844 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.844 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_23 1 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_23; Fanout = 1; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { clk } "NODE_NAME" } "" } } { "rom.vhd" "" { Text "D:/rom/rom.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.269 ns clk~clkctrl 2 COMB CLKCTRL_G2 171 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.269 ns; Loc. = CLKCTRL_G2; Fanout = 171; COMB Node = 'clk~clkctrl'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "rom.vhd" "" { Text "D:/rom/rom.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.909 ns) + CELL(0.666 ns) 2.844 ns sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\] 3 REG LCFF_X26_Y6_N7 6 " "Info: 3: + IC(0.909 ns) + CELL(0.666 ns) = 2.844 ns; Loc. = LCFF_X26_Y6_N7; Fanout = 6; REG Node = 'sld_signaltap:rom1\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_rmd:auto_generated\|safe_q\[0\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.575 ns" { clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 88 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.796 ns ( 63.15 % ) " "Info: Total cell delay = 1.796 ns ( 63.15 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.048 ns ( 36.85 % ) " "Info: Total interconnect delay = 1.048 ns ( 36.85 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.844 ns" { clk clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.844 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.139ns 0.909ns } { 0.000ns 1.130ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.934 ns" { clk clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.934 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } { 0.000ns 0.000ns 0.139ns 0.831ns } { 0.000ns 1.130ns 0.000ns 0.834ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.844 ns" { clk clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.844 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.139ns 0.909ns } { 0.000ns 1.130ns 0.000ns 0.666ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "db/cntr_rmd.tdf" "" { Text "D:/rom/db/cntr_rmd.tdf" 88 8 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.046 ns + " "Info: + Micro setup delay of destination is 0.046 ns" {  } { { "db/altsyncram_faf2.tdf" "" { Text "D:/rom/db/altsyncram_faf2.tdf" 138 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "6.292 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "6.292 ns" { sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita0~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita1~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita2~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita3~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita4~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita5~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita6~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita7~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~COUT sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|counter_comb_bita8~16 sld_signaltap:rom1|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~113 sld_signaltap:rom1|sld_ela_control:ela_control|buffer_write_ena_int~43 sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } { 0.000ns 0.481ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.394ns 0.376ns 1.347ns } { 0.000ns 0.621ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.624ns 0.781ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.934 ns" { clk clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.934 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_faf2:auto_generated|ram_block1a3~porta_datain_reg8 } { 0.000ns 0.000ns 0.139ns 0.831ns } { 0.000ns 1.130ns 0.000ns 0.834ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "2.844 ns" { clk clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.844 ns" { clk clk~combout clk~clkctrl sld_signaltap:rom1|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_rmd:auto_generated|safe_q[0] } { 0.000ns 0.000ns 0.139ns 0.909ns } { 0.000ns 1.130ns 0.000ns 0.666ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] register sld_hub:sld_hub_inst\|hub_tdo 96.39 MHz 10.374 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 96.39 MHz between source register \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]\" and destination register \"sld_hub:sld_hub_inst\|hub_tdo\" (period= 10.374 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.893 ns + Longest register register " "Info: + Longest register to register delay is 4.893 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] 1 REG LCFF_X29_Y7_N27 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y7_N27; Fanout = 9; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.213 ns) + CELL(0.319 ns) 1.532 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~13 2 COMB LCCOMB_X29_Y9_N14 1 " "Info: 2: + IC(1.213 ns) + CELL(0.319 ns) = 1.532 ns; Loc. = LCCOMB_X29_Y9_N14; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~13'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.532 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1020 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.366 ns) + CELL(0.589 ns) 2.487 ns sld_hub:sld_hub_inst\|hub_tdo~448 3 COMB LCCOMB_X29_Y9_N8 1 " "Info: 3: + IC(0.366 ns) + CELL(0.589 ns) = 2.487 ns; Loc. = LCCOMB_X29_Y9_N8; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~448'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.955 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~448 } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.716 ns) + CELL(0.651 ns) 3.854 ns sld_hub:sld_hub_inst\|hub_tdo~450 4 COMB LCCOMB_X29_Y9_N20 1 " "Info: 4: + IC(0.716 ns) + CELL(0.651 ns) = 3.854 ns; Loc. = LCCOMB_X29_Y9_N20; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~450'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.367 ns" { sld_hub:sld_hub_inst|hub_tdo~448 sld_hub:sld_hub_inst|hub_tdo~450 } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.394 ns) + CELL(0.537 ns) 4.785 ns sld_hub:sld_hub_inst\|hub_tdo~454 5 COMB LCCOMB_X29_Y9_N4 1 " "Info: 5: + IC(0.394 ns) + CELL(0.537 ns) = 4.785 ns; Loc. = LCCOMB_X29_Y9_N4; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~454'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.931 ns" { sld_hub:sld_hub_inst|hub_tdo~450 sld_hub:sld_hub_inst|hub_tdo~454 } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 4.893 ns sld_hub:sld_hub_inst\|hub_tdo 6 REG LCFF_X29_Y9_N5 2 " "Info: 6: + IC(0.000 ns) + CELL(0.108 ns) = 4.893 ns; Loc. = LCFF_X29_Y9_N5; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "0.108 ns" { sld_hub:sld_hub_inst|hub_tdo~454 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.204 ns ( 45.04 % ) " "Info: Total cell delay = 2.204 ns ( 45.04 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.689 ns ( 54.96 % ) " "Info: Total interconnect delay = 2.689 ns ( 54.96 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "4.893 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~448 sld_hub:sld_hub_inst|hub_tdo~450 sld_hub:sld_hub_inst|hub_tdo~454 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "4.893 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~448 sld_hub:sld_hub_inst|hub_tdo~450 sld_hub:sld_hub_inst|hub_tdo~454 sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.213ns 0.366ns 0.716ns 0.394ns 0.000ns } { 0.000ns 0.319ns 0.589ns 0.651ns 0.537ns 0.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.030 ns - Smallest " "Info: - Smallest clock skew is -0.030 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 3.319 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 3.319 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y10_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y10_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.775 ns) + CELL(0.000 ns) 1.775 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 205 " "Info: 2: + IC(1.775 ns) + CELL(0.000 ns) = 1.775 ns; Loc. = CLKCTRL_G3; Fanout = 205; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.775 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.878 ns) + CELL(0.666 ns) 3.319 ns sld_hub:sld_hub_inst\|hub_tdo 3 REG LCFF_X29_Y9_N5 2 " "Info: 3: + IC(0.878 ns) + CELL(0.666 ns) = 3.319 ns; Loc. = LCFF_X29_Y9_N5; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.544 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 20.07 % ) " "Info: Total cell delay = 0.666 ns ( 20.07 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.653 ns ( 79.93 % ) " "Info: Total interconnect delay = 2.653 ns ( 79.93 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.775ns 0.878ns } { 0.000ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 3.349 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 3.349 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y10_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y10_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.775 ns) + CELL(0.000 ns) 1.775 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 205 " "Info: 2: + IC(1.775 ns) + CELL(0.000 ns) = 1.775 ns; Loc. = CLKCTRL_G3; Fanout = 205; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.775 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.908 ns) + CELL(0.666 ns) 3.349 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] 3 REG LCFF_X29_Y7_N27 9 " "Info: 3: + IC(0.908 ns) + CELL(0.666 ns) = 3.349 ns; Loc. = LCFF_X29_Y7_N27; Fanout = 9; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "1.574 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } "" } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 19.89 % ) " "Info: Total cell delay = 0.666 ns ( 19.89 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.683 ns ( 80.11 % ) " "Info: Total interconnect delay = 2.683 ns ( 80.11 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } { 0.000ns 1.775ns 0.908ns } { 0.000ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.775ns 0.878ns } { 0.000ns 0.000ns 0.666ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } { 0.000ns 1.775ns 0.908ns } { 0.000ns 0.000ns 0.666ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" {  } { { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } } { "../altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "4.893 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~448 sld_hub:sld_hub_inst|hub_tdo~450 sld_hub:sld_hub_inst|hub_tdo~454 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "4.893 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~448 sld_hub:sld_hub_inst|hub_tdo~450 sld_hub:sld_hub_inst|hub_tdo~454 sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.213ns 0.366ns 0.716ns 0.394ns 0.000ns } { 0.000ns 0.319ns 0.589ns 0.651ns 0.537ns 0.108ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.319 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.775ns 0.878ns } { 0.000ns 0.000ns 0.666ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "rom" "UNKNOWN" "V1" "D:/rom/db/rom.quartus_db" { Floorplan "D:/rom/" "" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.349 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } { 0.000ns 1.775ns 0.908ns } { 0.000ns 0.000ns 0.666ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}