📄 lcd_v.fit.qmsg

📁 FPGA实现的LCD接口
💻 QMSG
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{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena  " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1612 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1612" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1612" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1612 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1612 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1613 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1613" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1613" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1613 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1613 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1614 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1614" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1614" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1614 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1614 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1615 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1615" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1615" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1615 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1615 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1616 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1616" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1616" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1616 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1616 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1617 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1617" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1617" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1617 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1617 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1618 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1618" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1618" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1618 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1618 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1619 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1619" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1619" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1619 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1619 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1620 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1620" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1620" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1620 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1620 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1621 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1621" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~1621" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1621 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1621 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Info: Non-global destination nodes limited to 10 nodes" {  } {  } 0}  } {  } 0}  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 400 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\] " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|IRSR_D\[2\]~450 " "Info: Destination node sld_hub:sld_hub_inst\|IRSR_D\[2\]~450" {  } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 334 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|IRSR_D\[2\]~450" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~450 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~450 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~110 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~110 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~108 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~108" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1017 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~108" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~108 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~108 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70" {  } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~70 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~70 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1399 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~85 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~85 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } }  } 0}  } {  } 0}  } { { "sld_dffex.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]" } } } } { "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" "" { Report "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v_cmp.qrpt" Compiler "lcd_v" "UNKNOWN" "V1" "E:/code/EP2C35/S6_LCD_V/proj/db/lcd_v.quartus_db" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } "" } } { "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" { Floorplan "E:/code/EP2C35/S6_LCD_V/proj/lcd_v.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 0}
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