📄 lcd_v.map.qmsg

📁 FPGA实现的LCD接口
💻 QMSG
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{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcd_v\|lcd:inst1\|state " "Info: Encoding result for state machine \"\|lcd_v\|lcd:inst1\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "10 " "Info: Completed encoding using 10 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.IDLE " "Info: Encoded state bit \"lcd:inst1\|state.IDLE\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.WRITERAM " "Info: Encoded state bit \"lcd:inst1\|state.WRITERAM\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETDDRAM " "Info: Encoded state bit \"lcd:inst1\|state.SETDDRAM\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETCGRAM " "Info: Encoded state bit \"lcd:inst1\|state.SETCGRAM\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETFUNCTION " "Info: Encoded state bit \"lcd:inst1\|state.SETFUNCTION\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SHIFT " "Info: Encoded state bit \"lcd:inst1\|state.SHIFT\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SWITCHMODE " "Info: Encoded state bit \"lcd:inst1\|state.SWITCHMODE\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETMODE " "Info: Encoded state bit \"lcd:inst1\|state.SETMODE\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.RETURNCURSOR " "Info: Encoded state bit \"lcd:inst1\|state.RETURNCURSOR\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.CLEAR " "Info: Encoded state bit \"lcd:inst1\|state.CLEAR\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0}  } {  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.IDLE 0000000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.IDLE\" uses code string \"0000000000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETCGRAM 1001000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETCGRAM\" uses code string \"1001000000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SWITCHMODE 1000001000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SWITCHMODE\" uses code string \"1000001000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.RETURNCURSOR 1000000010 " "Info: State \"\|lcd_v\|lcd:inst1\|state.RETURNCURSOR\" uses code string \"1000000010\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.WRITERAM 1100000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.WRITERAM\" uses code string \"1100000000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETMODE 1000000100 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETMODE\" uses code string \"1000000100\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.CLEAR 1000000001 " "Info: State \"\|lcd_v\|lcd:inst1\|state.CLEAR\" uses code string \"1000000001\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SHIFT 1000010000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SHIFT\" uses code string \"1000010000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETFUNCTION 1000100000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETFUNCTION\" uses code string \"1000100000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETDDRAM 1010000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETDDRAM\" uses code string \"1010000000\"" {  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0}  } { { "lcd.v" "" { Text "E:/code/EP2C35/S6_LCD_V/proj/lcd.v" 8 -1 0 } }  } 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "9 " "Info: Ignored 9 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "9 " "Info: Ignored 9 SOFT buffer(s)" {  } {  } 0}  } {  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[16\] data_in GND " "Warning: Reduced register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[16\]\" with stuck data_in port to stuck value GND" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 437 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1\|holdff data_in GND " "Warning: Reduced register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1\|holdff\" with stuck data_in port to stuck value GND" {  } { { "sld_mbpmg.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" 309 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[16\] data_in GND " "Warning: Reduced register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[16\]\" with stuck data_in port to stuck value GND" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[16\] data_in GND " "Warning: Reduced register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[16\]\" with stuck data_in port to stuck value GND" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[2\]\[16\] data_in GND " "Warning: Reduced register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[2\]\[16\]\" with stuck data_in port to stuck value GND" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[6\] " "Warning: Converting TRI node \"lcd:inst1\|data\[6\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[5\] " "Warning: Converting TRI node \"lcd:inst1\|data\[5\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[4\] " "Warning: Converting TRI node \"lcd:inst1\|data\[4\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[3\] " "Warning: Converting TRI node \"lcd:inst1\|data\[3\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[2\] " "Warning: Converting TRI node \"lcd:inst1\|data\[2\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[1\] " "Warning: Converting TRI node \"lcd:inst1\|data\[1\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "lcd:inst1\|data\[0\] " "Warning: Converting TRI node \"lcd:inst1\|data\[0\]\" that feeds logic to an OR gate" {  } {  } 0}
{ "Warning" "WOPT_MLS_OPNDRN_REMOVED" "lcd:inst1\|data\[7\]~25 " "Warning: Removing OPNDRN node \"lcd:inst1\|data\[7\]~25\" that feeds logic" {  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[0\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[0\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[0\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[0\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[0\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[0\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[1\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[1\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[1\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[1\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[1\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[1\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[2\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[2\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[2\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[2\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[2\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[2\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[3\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[3\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[3\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[3\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[3\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[3\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[4\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[4\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[4\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[4\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[4\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[4\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[5\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[5\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[5\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[5\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[5\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[5\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[6\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[6\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[6\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[6\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[6\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[6\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[7\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[7\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[7\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[7\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[7\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[7\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[8\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[8\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[8\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[8\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[8\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[8\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[9\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[9\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[9\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[9\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[9\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[9\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[10\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[10\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[10\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[10\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[10\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[10\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[11\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[11\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[11\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[11\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 434 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[11\] sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1\|holdff " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_pipe_reg\[1\]\[11\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_basic_multi_level_trigger:\\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm\|sld_mbpmg:\\trigger_modules_gen:0:trigger_match\|sld_sbpmg:\\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1\|holdff\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 436 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[12\] sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[12\] " "Info: Duplicate register \"sld_signaltap:auto_signaltap_0\|acq_data_in_reg\[12\]\" merged to single register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[12\]\"" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd
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💿 文件大小 1178 K
👤 上传用户 jellylihui
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#FPGA #LCD #接口
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