lcd_v.map.rpt

FPGA实现的LCD接口

;     -- arithmetic mode                      ; 70                       ;
; Total registers                             ; 373                      ;
; I/O pins                                    ; 13                       ;
; Total memory bits                           ; 34816                    ;
; Maximum fan-out node                        ; altera_internal_jtag~TDO ;
; Maximum fan-out                             ; 241                      ;
; Total fan-out                               ; 2735                     ;
; Average fan-out                             ; 3.69                     ;
+---------------------------------------------+--------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+---------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node                                                                        ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                                                                                                                                          ;
+---------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; |lcd_v                                                                                            ; 334 (1)           ; 373 (0)      ; 34816       ; 0            ; 0       ; 0         ; 13   ; 0            ; |lcd_v                                                                                                                                                                                                                                                                                                       ;
;    |div16:inst|                                                                                   ; 6 (6)             ; 4 (4)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|div16:inst                                                                                                                                                                                                                                                                                            ;
;    |lcd:inst1|                                                                                    ; 51 (51)           ; 42 (42)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|lcd:inst1                                                                                                                                                                                                                                                                                             ;
;    |sld_hub:sld_hub_inst|                                                                         ; 90 (48)           ; 71 (6)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst                                                                                                                                                                                                                                                                                  ;
;       |lpm_decode:instruction_decoder|                                                            ; 5 (0)             ; 5 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder                                                                                                                                                                                                                                                   ;
;          |decode_rpe:auto_generated|                                                              ; 5 (5)             ; 5 (5)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated                                                                                                                                                                                                                         ;
;       |lpm_shiftreg:jtag_ir_register|                                                             ; 0 (0)             ; 10 (10)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register                                                                                                                                                                                                                                                    ;
;       |sld_dffex:BROADCAST|                                                                       ; 0 (0)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:BROADCAST                                                                                                                                                                                                                                                              ;
;       |sld_dffex:IRF_ENA_0|                                                                       ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0                                                                                                                                                                                                                                                              ;
;       |sld_dffex:IRF_ENA|                                                                         ; 0 (0)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA                                                                                                                                                                                                                                                                ;
;       |sld_dffex:IRSR|                                                                            ; 2 (2)             ; 8 (8)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:IRSR                                                                                                                                                                                                                                                                   ;
;       |sld_dffex:RESET|                                                                           ; 0 (0)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:RESET                                                                                                                                                                                                                                                                  ;
;       |sld_dffex:\GEN_IRF:1:IRF|                                                                  ; 0 (0)             ; 5 (5)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF                                                                                                                                                                                                                                                         ;
;       |sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|                                                         ; 0 (0)             ; 5 (5)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF                                                                                                                                                                                                                                                ;
;       |sld_jtag_state_machine:jtag_state_machine|                                                 ; 20 (20)           ; 19 (19)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine                                                                                                                                                                                                                                        ;
;       |sld_rom_sr:HUB_INFO_REG|                                                                   ; 14 (14)           ; 9 (9)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG                                                                                                                                                                                                                                                          ;
;    |sld_signaltap:auto_signaltap_0|                                                               ; 186 (4)           ; 256 (33)     ; 34816       ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0                                                                                                                                                                                                                                                                        ;
;       |altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|                                           ; 0 (0)             ; 0 (0)        ; 34816       ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram                                                                                                                                                                                                                        ;
;          |altsyncram_np92:auto_generated|                                                         ; 0 (0)             ; 0 (0)        ; 34816       ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_np92:auto_generated                                                                                                                                                                                         ;
;             |altsyncram_tg91:altsyncram1|                                                         ; 0 (0)             ; 0 (0)        ; 34816       ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_np92:auto_generated|altsyncram_tg91:altsyncram1                                                                                                                                                             ;
;       |sld_acquisition_buffer:sld_acquisition_buffer_inst|                                        ; 15 (3)            ; 23 (1)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst                                                                                                                                                                                                                     ;
;          |lpm_counter:\write_address_non_zero_gen:write_pointer_counter|                          ; 12 (0)            ; 11 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter                                                                                                                                                       ;
;             |cntr_h5a:auto_generated|                                                             ; 12 (12)           ; 11 (11)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_h5a:auto_generated                                                                                                                               ;
;          |lpm_ff:\gen_non_zero_sample_depth:trigger_address_register|                             ; 0 (0)             ; 11 (11)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_ff:\gen_non_zero_sample_depth:trigger_address_register                                                                                                                                                          ;
;       |sld_ela_control:ela_control|                                                               ; 87 (4)            ; 136 (0)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control                                                                                                                                                                                                                                            ;
;          |lpm_shiftreg:trigger_config_deserialize|                                                ; 0 (0)             ; 20 (20)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize                                                                                                                                                                                                    ;
;          |sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm| ; 33 (0)            ; 84 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm                                                                                                                                                     ;
;             |lpm_shiftreg:trigger_condition_deserialize|                                          ; 0 (0)             ; 51 (51)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize                                                                                                          ;
;             |sld_mbpmg:\trigger_modules_gen:0:trigger_match|                                      ; 33 (0)            ; 33 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match                                                                                                      ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:10:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:11:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:12:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:13:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:14:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|                           ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:15:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|                           ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:16:sm1                                               ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:8:sm1                                                ;
;                |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|                            ; 2 (2)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:9:sm1                                                ;
;          |sld_ela_level_seq_mgr:ela_level_seq_mgr|                                                ; 10 (10)           ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_level_seq_mgr:ela_level_seq_mgr                                                                                                                                                                                                    ;
;          |sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1|                            ; 12 (1)            ; 11 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_v|sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1                                                                                                                                                                                ;