count.tan.summary

来自「一些较为经典的VHDL代码,专注于信号分析与检测方面」· SUMMARY 代码 · 共 57 行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 6.685 ns
From           : reset
To             : count_int[12]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.195 ns
From           : plus_1s~reg0
To             : plus_1s
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -5.148 ns
From           : reset
To             : plus_1s~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 185.36 MHz ( period = 5.395 ns )
From           : count_int[7]
To             : count_int[12]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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