📄 freq_cnt.sim_ori.vwf

📁 利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期
💻 VWF
📖 第 1 页 / 共 3 页
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TRANSITION_LIST("count_int[0]")
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TRANSITION_LIST("lock")
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TRANSITION_LIST("lock_buf")
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TRANSITION_LIST("reset")
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TRANSITION_LIST("signel")
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TRANSITION_LIST("freq[26]")
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TRANSITION_LIST("freq[25]")
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TRANSITION_LIST("freq[24]")
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TRANSITION_LIST("freq[23]")
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TRANSITION_LIST("freq[22]")
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TRANSITION_LIST("freq[21]")
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TRANSITION_LIST("freq[20]")
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TRANSITION_LIST("freq[19]")
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TRANSITION_LIST("freq[18]")
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TRANSITION_LIST("freq[17]")
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TRANSITION_LIST("freq[16]")
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TRANSITION_LIST("freq[15]")
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TRANSITION_LIST("freq[14]")
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TRANSITION_LIST("freq[13]")
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TRANSITION_LIST("freq[12]")
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TRANSITION_LIST("freq[11]")
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TRANSITION_LIST("freq[10]")
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TRANSITION_LIST("freq[9]")
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TRANSITION_LIST("freq[8]")
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TRANSITION_LIST("freq[7]")
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TRANSITION_LIST("freq[6]")
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TRANSITION_LIST("freq[5]")
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TRANSITION_LIST("freq[4]")
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TRANSITION_LIST("freq[3]")
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TRANSITION_LIST("freq[2]")
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TRANSITION_LIST("freq[1]")
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TRANSITION_LIST("freq[0]")
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TRANSITION_LIST("count_int[7]")
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TRANSITION_LIST("count_int[10]")
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TRANSITION_LIST("count_int[11]")
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TRANSITION_LIST("count_int[12]")
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TRANSITION_LIST("count_int[13]")
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TRANSITION_LIST("count_int[14]")
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TRANSITION_LIST("count_int[15]")
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TRANSITION_LIST("count_int[16]")
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TRANSITION_LIST("count_int[18]")
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TRANSITION_LIST("count_int[19]")
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TRANSITION_LIST("count_int[20]")
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TRANSITION_LIST("count_int[21]")
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💿 文件大小 267 K
👤 上传用户 jhjfjh22544
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#FPGA #VHDL #脉宽 #测试技术
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