test.map.eqn

利用Verilog HDL对AD7705进行控制ADC采样

--C1_count[8] is M10MHz:inst1|count[8]
--operation mode is normal

C1_count[8]_lut_out = C1L74;
C1_count[8] = DFFEAS(C1_count[8]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_count[7] is M10MHz:inst1|count[7]
--operation mode is normal

C1_count[7]_lut_out = C1L94;
C1_count[7] = DFFEAS(C1_count[7]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1L401 is M10MHz:inst1|P10MHz~293
--operation mode is normal

C1L401 = !C1_count[10] & !C1_count[9] & !C1_count[8] & !C1_count[7];


--C1_count[6] is M10MHz:inst1|count[6]
--operation mode is normal

C1_count[6]_lut_out = C1L15;
C1_count[6] = DFFEAS(C1_count[6]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_count[5] is M10MHz:inst1|count[5]
--operation mode is normal

C1_count[5]_lut_out = C1L35;
C1_count[5] = DFFEAS(C1_count[5]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1L501 is M10MHz:inst1|P10MHz~294
--operation mode is normal

C1L501 = !C1_count[6] & !C1_count[5];


--C1_count[31] is M10MHz:inst1|count[31]
--operation mode is normal

C1_count[31]_lut_out = C1L55;
C1_count[31] = DFFEAS(C1_count[31]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_count[4] is M10MHz:inst1|count[4]
--operation mode is normal

C1_count[4]_lut_out = C1L65;
C1_count[4] = DFFEAS(C1_count[4]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_count[1] is M10MHz:inst1|count[1]
--operation mode is normal

C1_count[1]_lut_out = C1L85 & C1L901;
C1_count[1] = DFFEAS(C1_count[1]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1L601 is M10MHz:inst1|P10MHz~295
--operation mode is normal

C1L601 = C1L501 & !C1_count[31] & !C1_count[4] & !C1_count[1];


--C1L701 is M10MHz:inst1|P10MHz~296
--operation mode is normal

C1L701 = C1L201 & C1L301 & C1L401 & C1L601;


--C1_count[3] is M10MHz:inst1|count[3]
--operation mode is normal

C1_count[3]_lut_out = C1L06 & C1L901;
C1_count[3] = DFFEAS(C1_count[3]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_count[0] is M10MHz:inst1|count[0]
--operation mode is normal

C1_count[0]_lut_out = C1L26;
C1_count[0] = DFFEAS(C1_count[0]_lut_out, C2_P10MHz, VCC, , , , , , );


--C1L901 is M10MHz:inst1|reduce_nor~1
--operation mode is normal

C1L901 = C1_count[2] # !C1_count[0] # !C1_count[3] # !C1L701;


--C1L801 is M10MHz:inst1|P10MHz~297
--operation mode is normal

C1L801 = C1_count[2] & (!C1_count[3] & !C1_count[0]);


--B1_SDOdata[23] is SetData:inst|SDOdata[23]
--operation mode is normal

B1_SDOdata[23]_lut_out = SDO;
B1_SDOdata[23] = DFFEAS(B1_SDOdata[23]_lut_out, C2_P10MHz, VCC, , B1L793, , , , );


--B1_flag is SetData:inst|flag
--operation mode is normal

B1_flag_lut_out = !SDO;
B1_flag = DFFEAS(B1_flag_lut_out, C2_P10MHz, VCC, , B1L672, , , , );


--B1L743 is SetData:inst|SDO_out[23]~480
--operation mode is normal

B1L743 = B1_flag & (!B1_count_rom[31]);


--B1L352 is SetData:inst|LessThan~4636
--operation mode is normal

B1L352 = B1_count_rom[2] & B1_count_rom[3] & !B1L152 # !B1L942;


--B1L452 is SetData:inst|LessThan~4637
--operation mode is normal

B1L452 = B1_count_rom[12] & B1_count_rom[7] & B1L252 & B1L352;


--B1L552 is SetData:inst|LessThan~4638
--operation mode is normal

B1L552 = B1L452 # B1_count_rom[12] & B1_count_rom[11] # !B1L842;


--B1L652 is SetData:inst|LessThan~4639
--operation mode is normal

B1L652 = B1L552 # B1_count_rom[12] & (B1_count_rom[10] # B1_count_rom[9]);


--B1L752 is SetData:inst|LessThan~4640
--operation mode is normal

B1L752 = B1_count_rom[19] & B1_count_rom[20] & B1_count_rom[15] & B1_count_rom[17];


--B1L852 is SetData:inst|LessThan~4641
--operation mode is normal

B1L852 = !B1_count_rom[21] & (!B1_count_rom[20] # !B1_count_rom[19] # !B1_count_rom[18]);


--B1L952 is SetData:inst|LessThan~4642
--operation mode is normal

B1L952 = B1_count_rom[16] & B1L652 & B1L752 # !B1L852;


--B1L062 is SetData:inst|LessThan~4643
--operation mode is normal

B1L062 = B1_count_rom[16] & B1L752 & (B1_count_rom[13] # B1_count_rom[14]);


--B1L162 is SetData:inst|LessThan~4644
--operation mode is normal

B1L162 = B1_count_rom[21] # B1L052 # B1L062;


--B1L262 is SetData:inst|LessThan~4645
--operation mode is normal

B1L262 = B1_count_rom[3] & (B1_count_rom[1] # B1_count_rom[2]);


--B1L362 is SetData:inst|LessThan~4646
--operation mode is normal

B1L362 = B1_count_rom[5] & B1_count_rom[8] & (B1_count_rom[4] # B1L262);


--B1L462 is SetData:inst|LessThan~4647
--operation mode is normal

B1L462 = !B1_count_rom[10] & !B1_count_rom[9] & (!B1_count_rom[8] # !B1_count_rom[7]);


--B1L562 is SetData:inst|LessThan~4648
--operation mode is normal

B1L562 = B1_count_rom[11] # B1L252 # B1L362 # !B1L462;


--B1L662 is SetData:inst|LessThan~4649
--operation mode is normal

B1L662 = B1_count_rom[12] & B1_count_rom[16] & B1L752;


--B1L762 is SetData:inst|LessThan~4650
--operation mode is normal

B1L762 = B1_count_rom[22] & (B1L162 # B1L562 & B1L662);


--B1L843 is SetData:inst|SDO_out[23]~481
--operation mode is normal

B1L843 = B1L743 & (B1L952 & B1L762 # !B1L742);


--B1_SDOdata[22] is SetData:inst|SDOdata[22]
--operation mode is normal

B1_SDOdata[22]_lut_out = SDO;
B1_SDOdata[22] = DFFEAS(B1_SDOdata[22]_lut_out, C2_P10MHz, VCC, , B1L593, , , , );


--B1_SDOdata[21] is SetData:inst|SDOdata[21]
--operation mode is normal

B1_SDOdata[21]_lut_out = SDO;
B1_SDOdata[21] = DFFEAS(B1_SDOdata[21]_lut_out, C2_P10MHz, VCC, , B1L393, , , , );


--B1_SDOdata[20] is SetData:inst|SDOdata[20]
--operation mode is normal

B1_SDOdata[20]_lut_out = SDO;
B1_SDOdata[20] = DFFEAS(B1_SDOdata[20]_lut_out, C2_P10MHz, VCC, , B1L193, , , , );


--B1_SDOdata[19] is SetData:inst|SDOdata[19]
--operation mode is normal

B1_SDOdata[19]_lut_out = SDO;
B1_SDOdata[19] = DFFEAS(B1_SDOdata[19]_lut_out, C2_P10MHz, VCC, , B1L983, , , , );


--B1_SDOdata[18] is SetData:inst|SDOdata[18]
--operation mode is normal

B1_SDOdata[18]_lut_out = SDO;
B1_SDOdata[18] = DFFEAS(B1_SDOdata[18]_lut_out, C2_P10MHz, VCC, , B1L783, , , , );


--B1_SDOdata[17] is SetData:inst|SDOdata[17]
--operation mode is normal

B1_SDOdata[17]_lut_out = SDO;
B1_SDOdata[17] = DFFEAS(B1_SDOdata[17]_lut_out, C2_P10MHz, VCC, , B1L583, , , , );


--B1_SDOdata[16] is SetData:inst|SDOdata[16]
--operation mode is normal

B1_SDOdata[16]_lut_out = SDO;
B1_SDOdata[16] = DFFEAS(B1_SDOdata[16]_lut_out, C2_P10MHz, VCC, , B1L383, , , , );


--B1_SDOdata[15] is SetData:inst|SDOdata[15]
--operation mode is normal

B1_SDOdata[15]_lut_out = SDO;
B1_SDOdata[15] = DFFEAS(B1_SDOdata[15]_lut_out, C2_P10MHz, VCC, , B1L183, , , , );


--B1_SDOdata[14] is SetData:inst|SDOdata[14]
--operation mode is normal

B1_SDOdata[14]_lut_out = SDO;
B1_SDOdata[14] = DFFEAS(B1_SDOdata[14]_lut_out, C2_P10MHz, VCC, , B1L973, , , , );


--B1_SDOdata[13] is SetData:inst|SDOdata[13]
--operation mode is normal

B1_SDOdata[13]_lut_out = SDO;
B1_SDOdata[13] = DFFEAS(B1_SDOdata[13]_lut_out, C2_P10MHz, VCC, , B1L773, , , , );


--B1_SDOdata[12] is SetData:inst|SDOdata[12]
--operation mode is normal

B1_SDOdata[12]_lut_out = SDO;
B1_SDOdata[12] = DFFEAS(B1_SDOdata[12]_lut_out, C2_P10MHz, VCC, , B1L573, , , , );


--B1_SDOdata[11] is SetData:inst|SDOdata[11]
--operation mode is normal

B1_SDOdata[11]_lut_out = SDO;
B1_SDOdata[11] = DFFEAS(B1_SDOdata[11]_lut_out, C2_P10MHz, VCC, , B1L373, , , , );


--B1_SDOdata[10] is SetData:inst|SDOdata[10]
--operation mode is normal

B1_SDOdata[10]_lut_out = SDO;
B1_SDOdata[10] = DFFEAS(B1_SDOdata[10]_lut_out, C2_P10MHz, VCC, , B1L173, , , , );


--B1_SDOdata[9] is SetData:inst|SDOdata[9]
--operation mode is normal

B1_SDOdata[9]_lut_out = SDO;
B1_SDOdata[9] = DFFEAS(B1_SDOdata[9]_lut_out, C2_P10MHz, VCC, , B1L963, , , , );


--B1_SDOdata[8] is SetData:inst|SDOdata[8]
--operation mode is normal

B1_SDOdata[8]_lut_out = SDO;
B1_SDOdata[8] = DFFEAS(B1_SDOdata[8]_lut_out, C2_P10MHz, VCC, , B1L763, , , , );


--B1_SDOdata[7] is SetData:inst|SDOdata[7]
--operation mode is normal

B1_SDOdata[7]_lut_out = SDO;
B1_SDOdata[7] = DFFEAS(B1_SDOdata[7]_lut_out, C2_P10MHz, VCC, , B1L563, , , , );


--B1_SDOdata[6] is SetData:inst|SDOdata[6]
--operation mode is normal

B1_SDOdata[6]_lut_out = SDO;
B1_SDOdata[6] = DFFEAS(B1_SDOdata[6]_lut_out, C2_P10MHz, VCC, , B1L363, , , , );


--B1_SDOdata[5] is SetData:inst|SDOdata[5]
--operation mode is normal

B1_SDOdata[5]_lut_out = SDO;
B1_SDOdata[5] = DFFEAS(B1_SDOdata[5]_lut_out, C2_P10MHz, VCC, , B1L163, , , , );


--B1_SDOdata[4] is SetData:inst|SDOdata[4]
--operation mode is normal

B1_SDOdata[4]_lut_out = SDO;
B1_SDOdata[4] = DFFEAS(B1_SDOdata[4]_lut_out, C2_P10MHz, VCC, , B1L953, , , , );


--B1_SDOdata[3] is SetData:inst|SDOdata[3]
--operation mode is normal

B1_SDOdata[3]_lut_out = SDO;
B1_SDOdata[3] = DFFEAS(B1_SDOdata[3]_lut_out, C2_P10MHz, VCC, , B1L753, , , , );


--B1_SDOdata[2] is SetData:inst|SDOdata[2]
--operation mode is normal

B1_SDOdata[2]_lut_out = SDO;
B1_SDOdata[2] = DFFEAS(B1_SDOdata[2]_lut_out, C2_P10MHz, VCC, , B1L553, , , , );


--B1_SDOdata[1] is SetData:inst|SDOdata[1]
--operation mode is normal

B1_SDOdata[1]_lut_out = SDO;
B1_SDOdata[1] = DFFEAS(B1_SDOdata[1]_lut_out, C2_P10MHz, VCC, , B1L353, , , , );


--B1_SDOdata[0] is SetData:inst|SDOdata[0]
--operation mode is normal

B1_SDOdata[0]_lut_out = SDO;
B1_SDOdata[0] = DFFEAS(B1_SDOdata[0]_lut_out, C2_P10MHz, VCC, , B1L153, , , , );


--B1L413 is SetData:inst|reduce_nor~218
--operation mode is normal

B1L413 = B1_count_rom[1] & B1_count_rom[10] & B1L013 & !B1_count_rom[8];


--B1L402 is SetData:inst|data[31]~583
--operation mode is normal

B1L402 = !B1_count_rom[13] & !B1_count_rom[14] & !B1_count_rom[11] & !B1_count_rom[21];


--B1L502 is SetData:inst|data[31]~584
--operation mode is normal

B1L502 = B1_count_rom[1] & B1_count_rom[8] & !B1_count_rom[10] & !B1_count_rom[18];


--B1L602 is SetData:inst|data[31]~585
--operation mode is normal

B1L602 = B1L703 & B1_flag & B1L502 & !B1_count_rom[7];


--B1L702 is SetData:inst|data[31]~586
--operation mode is normal

B1L702 = B1_count_rom[22] & B1L903 & B1L662 & B1L602;


--B1L802 is SetData:inst|data[31]~587
--operation mode is normal

B1L802 = B1L742 & B1L402 & B1L702;


--B1L902 is SetData:inst|data[31]~588
--operation mode is normal

B1L902 = B1L802 & !B1_count_rom[31] & (B1L762 # !B1L742);


--B1L601 is SetData:inst|count_end[5]~463
--operation mode is normal

B1L601 = B1L113 & (B1L902 # B1L413) # !B1L501;


--B1L3 is SetData:inst|add~3857
--operation mode is arithmetic

B1L3_carry_eqn = B1L01;
B1L3 = B1_count[3] $ (B1L3_carry_eqn);

--B1L4 is SetData:inst|add~3859
--operation mode is arithmetic

B1L4 = CARRY(!B1L01 # !B1_count[3]);


--B1L771 is SetData:inst|count~1045
--operation mode is normal

B1L771 = B1_divider # !B1_count[31] & (B1L342 # !B1L932);


--B1L692 is SetData:inst|reduce_nor~1
--operation mode is normal

B1L692 = !B1L313 # !B1_count_rom[2] # !B1_count_rom[0];


--B1L513 is SetData:inst|reduce_nor~219
--operation mode is normal

B1L513 = B1_count_rom[6] # !B1_count_rom[8] # !B1_count_rom[3];


--B1L613 is SetData:inst|reduce_nor~220
--operation mode is normal

B1L613 = B1_count_rom[7] & (!B1_count_rom[0] & !B1_count_rom[1]);


--B1L003 is SetData:inst|reduce_nor~13
--operation mode is normal

B1L003 = B1L513 # !B1L613 # !B1L381 # !B1_count_rom[9];


--B1L713 is SetData:inst|reduce_nor~221
--operation mode is normal

B1L713 = B1_count_rom[2] & (!B1_count_rom[0]);


--B1L112 is SetData:inst|data~589
--operation mode is normal

B1L112 = B1L003 & (!B1L902 & !B1L413 # !B1L713);


--B1L813 is SetData:inst|reduce_nor~222
--operation mode is normal

B1L813 = B1_count_rom[3] # B1_count_rom[8] # !B1_count_rom[6];


--B1L992 is SetData:inst|reduce_nor~10
--operation mode is normal

B1L992 = B1L813 # !B1L613 # !B1L381 # !B1_count_rom[9];


--B1L792 is SetData:inst|reduce_nor~4
--operation mode is normal

B1L792 = !B1L303 # !B1L381 # !B1_count_rom[1] # !B1_count_rom[0];


--B1L913 is SetData:inst|reduce_nor~223
--operation mode is normal

B1L913 = B1_count_rom[0] # B1_count_rom[1] # !B1_count_rom[2];


--B1L212 is SetData:inst|data~590