test.map.eqn

利用Verilog HDL对AD7705进行控制ADC采样

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--B1_SDI_data is SetData:inst|SDI_data
--operation mode is normal

B1_SDI_data_lut_out = !B1L042 & (B1L392 # B1L592 & !B1L1);
B1_SDI_data = DFFEAS(B1_SDI_data_lut_out, C2_P10MHz, VCC, , !B1_divider, , , , );


--B1_Sclkout is SetData:inst|Sclkout
--operation mode is normal

B1_Sclkout_lut_out = B1_Sclkout # !B1L442;
B1_Sclkout = DFFEAS(B1_Sclkout_lut_out, C2_P10MHz, VCC, , , , , !B1_divider, );


--B1_CS is SetData:inst|CS
--operation mode is normal

B1_CS_lut_out = B1L581 # B1L491 # B1_CS & B1L501;
B1_CS = DFFEAS(B1_CS_lut_out, C2_P10MHz, VCC, , , , , , );


--C1_P10MHz is M10MHz:inst1|P10MHz
--operation mode is normal

C1_P10MHz_lut_out = C1L901 & (C1_P10MHz # C1L701 & C1L801);
C1_P10MHz = DFFEAS(C1_P10MHz_lut_out, C2_P10MHz, VCC, , , , , , );


--B1_SDO_out[23] is SetData:inst|SDO_out[23]
--operation mode is normal

B1_SDO_out[23]_lut_out = B1_SDOdata[23];
B1_SDO_out[23] = DFFEAS(B1_SDO_out[23]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[22] is SetData:inst|SDO_out[22]
--operation mode is normal

B1_SDO_out[22]_lut_out = B1_SDOdata[22];
B1_SDO_out[22] = DFFEAS(B1_SDO_out[22]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[21] is SetData:inst|SDO_out[21]
--operation mode is normal

B1_SDO_out[21]_lut_out = B1_SDOdata[21];
B1_SDO_out[21] = DFFEAS(B1_SDO_out[21]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[20] is SetData:inst|SDO_out[20]
--operation mode is normal

B1_SDO_out[20]_lut_out = B1_SDOdata[20];
B1_SDO_out[20] = DFFEAS(B1_SDO_out[20]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[19] is SetData:inst|SDO_out[19]
--operation mode is normal

B1_SDO_out[19]_lut_out = B1_SDOdata[19];
B1_SDO_out[19] = DFFEAS(B1_SDO_out[19]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[18] is SetData:inst|SDO_out[18]
--operation mode is normal

B1_SDO_out[18]_lut_out = B1_SDOdata[18];
B1_SDO_out[18] = DFFEAS(B1_SDO_out[18]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[17] is SetData:inst|SDO_out[17]
--operation mode is normal

B1_SDO_out[17]_lut_out = B1_SDOdata[17];
B1_SDO_out[17] = DFFEAS(B1_SDO_out[17]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[16] is SetData:inst|SDO_out[16]
--operation mode is normal

B1_SDO_out[16]_lut_out = B1_SDOdata[16];
B1_SDO_out[16] = DFFEAS(B1_SDO_out[16]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[15] is SetData:inst|SDO_out[15]
--operation mode is normal

B1_SDO_out[15]_lut_out = B1_SDOdata[15];
B1_SDO_out[15] = DFFEAS(B1_SDO_out[15]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[14] is SetData:inst|SDO_out[14]
--operation mode is normal

B1_SDO_out[14]_lut_out = B1_SDOdata[14];
B1_SDO_out[14] = DFFEAS(B1_SDO_out[14]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[13] is SetData:inst|SDO_out[13]
--operation mode is normal

B1_SDO_out[13]_lut_out = B1_SDOdata[13];
B1_SDO_out[13] = DFFEAS(B1_SDO_out[13]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[12] is SetData:inst|SDO_out[12]
--operation mode is normal

B1_SDO_out[12]_lut_out = B1_SDOdata[12];
B1_SDO_out[12] = DFFEAS(B1_SDO_out[12]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[11] is SetData:inst|SDO_out[11]
--operation mode is normal

B1_SDO_out[11]_lut_out = B1_SDOdata[11];
B1_SDO_out[11] = DFFEAS(B1_SDO_out[11]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[10] is SetData:inst|SDO_out[10]
--operation mode is normal

B1_SDO_out[10]_lut_out = B1_SDOdata[10];
B1_SDO_out[10] = DFFEAS(B1_SDO_out[10]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[9] is SetData:inst|SDO_out[9]
--operation mode is normal

B1_SDO_out[9]_lut_out = B1_SDOdata[9];
B1_SDO_out[9] = DFFEAS(B1_SDO_out[9]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[8] is SetData:inst|SDO_out[8]
--operation mode is normal

B1_SDO_out[8]_lut_out = B1_SDOdata[8];
B1_SDO_out[8] = DFFEAS(B1_SDO_out[8]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[7] is SetData:inst|SDO_out[7]
--operation mode is normal

B1_SDO_out[7]_lut_out = B1_SDOdata[7];
B1_SDO_out[7] = DFFEAS(B1_SDO_out[7]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[6] is SetData:inst|SDO_out[6]
--operation mode is normal

B1_SDO_out[6]_lut_out = B1_SDOdata[6];
B1_SDO_out[6] = DFFEAS(B1_SDO_out[6]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[5] is SetData:inst|SDO_out[5]
--operation mode is normal

B1_SDO_out[5]_lut_out = B1_SDOdata[5];
B1_SDO_out[5] = DFFEAS(B1_SDO_out[5]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[4] is SetData:inst|SDO_out[4]
--operation mode is normal

B1_SDO_out[4]_lut_out = B1_SDOdata[4];
B1_SDO_out[4] = DFFEAS(B1_SDO_out[4]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[3] is SetData:inst|SDO_out[3]
--operation mode is normal

B1_SDO_out[3]_lut_out = B1_SDOdata[3];
B1_SDO_out[3] = DFFEAS(B1_SDO_out[3]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[2] is SetData:inst|SDO_out[2]
--operation mode is normal

B1_SDO_out[2]_lut_out = B1_SDOdata[2];
B1_SDO_out[2] = DFFEAS(B1_SDO_out[2]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[1] is SetData:inst|SDO_out[1]
--operation mode is normal

B1_SDO_out[1]_lut_out = B1_SDOdata[1];
B1_SDO_out[1] = DFFEAS(B1_SDO_out[1]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_SDO_out[0] is SetData:inst|SDO_out[0]
--operation mode is normal

B1_SDO_out[0]_lut_out = B1_SDOdata[0];
B1_SDO_out[0] = DFFEAS(B1_SDO_out[0]_lut_out, C2_P10MHz, VCC, , B1L843, , , , );


--B1_count_end[3] is SetData:inst|count_end[3]
--operation mode is normal

B1_count_end[3]_lut_out = B1_count_rom[0] & !B1_count_rom[2] & B1L413;
B1_count_end[3] = DFFEAS(B1_count_end[3]_lut_out, C2_P10MHz, VCC, , B1L601, , , , );


--B1_count[3] is SetData:inst|count[3]
--operation mode is normal

B1_count[3]_lut_out = B1L3 & (!B1L771);
B1_count[3] = DFFEAS(B1_count[3]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[4] is SetData:inst|count[4]
--operation mode is normal

B1_count[4]_lut_out = B1L5 & (!B1L771);
B1_count[4] = DFFEAS(B1_count[4]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L1 is SetData:inst|add~3855
--operation mode is normal

B1L1 = B1_count[4] $ (B1_count[3] # !B1_count_end[3]);


--B1_data[26] is SetData:inst|data[26]
--operation mode is normal

B1_data[26]_lut_out = !B1L003;
B1_data[26] = DFFEAS(B1_data[26]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1L2 is SetData:inst|add~3856
--operation mode is normal

B1L2 = B1_count_end[3] $ B1_count[3];


--B1_data[31] is SetData:inst|data[31]
--operation mode is normal

B1_data[31]_lut_out = !B1_count_rom[0] & (B1_count_rom[2] & B1L413);
B1_data[31] = DFFEAS(B1_data[31]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1_count[0] is SetData:inst|count[0]
--operation mode is normal

B1_count[0]_lut_out = B1L7 & (!B1L771);
B1_count[0] = DFFEAS(B1_count[0]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L882 is SetData:inst|Mux~1072
--operation mode is normal

B1L882 = B1L2 & B1_data[26] # !B1L2 & (B1_data[31] & !B1_count[0]);


--B1_count[2] is SetData:inst|count[2]
--operation mode is normal

B1_count[2]_lut_out = B1L9 & (!B1L771);
B1_count[2] = DFFEAS(B1_count[2]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[1] is SetData:inst|count[1]
--operation mode is normal

B1_count[1]_lut_out = B1L11 & (!B1L771);
B1_count[1] = DFFEAS(B1_count[1]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L982 is SetData:inst|Mux~1073
--operation mode is normal

B1L982 = B1L1 & B1L882 & !B1_count[2] & !B1_count[1];


--B1L092 is SetData:inst|Mux~1074
--operation mode is normal

B1L092 = B1_count[2] & !B1_count[4] & (B1_count_end[3] $ !B1_count[3]);


--B1_data[27] is SetData:inst|data[27]
--operation mode is normal

B1_data[27]_lut_out = !B1L792;
B1_data[27] = DFFEAS(B1_data[27]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1L192 is SetData:inst|Mux~1075
--operation mode is normal

B1L192 = !B1_count[1] & (B1_count[0] & B1_data[26] # !B1_count[0] & (B1_data[27]));


--B1_data[24] is SetData:inst|data[24]
--operation mode is normal

B1_data[24]_lut_out = B1_count_rom[0] # !B1L902 & !B1L413 # !B1_count_rom[2];
B1_data[24] = DFFEAS(B1_data[24]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1_data[25] is SetData:inst|data[25]
--operation mode is normal

B1_data[25]_lut_out = B1L112;
B1_data[25] = DFFEAS(B1_data[25]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1L292 is SetData:inst|Mux~1076
--operation mode is normal

B1L292 = B1_count[1] & (B1_count[0] & B1_data[24] # !B1_count[0] & (B1_data[25]));


--B1L392 is SetData:inst|Mux~1077
--operation mode is normal

B1L392 = B1L982 # B1L092 & (B1L192 # B1L292);


--B1_data[7] is SetData:inst|data[7]
--operation mode is normal

B1_data[7]_lut_out = B1L112 & B1L992 & B1L212;
B1_data[7] = DFFEAS(B1_data[7]_lut_out, C2_P10MHz, VCC, , B1L012, , , , );


--B1L492 is SetData:inst|Mux~1078
--operation mode is normal

B1L492 = !B1_count[1] & !B1_count[0] & B1_data[7];


--B1L592 is SetData:inst|Mux~1079
--operation mode is normal

B1L592 = B1L2 & (B1_count[2] & B1_data[26] # !B1_count[2] & (B1L492)) # !B1L2 & !B1_count[2] & B1_data[26];


--B1_count[5] is SetData:inst|count[5]
--operation mode is normal

B1_count[5]_lut_out = B1L31 & (!B1L771);
B1_count[5] = DFFEAS(B1_count[5]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L132 is SetData:inst|LessThan~4614
--operation mode is normal

B1L132 = B1_count_end[3] & (B1_count[4] # B1_count[3]);


--B1_count[30] is SetData:inst|count[30]
--operation mode is normal

B1_count[30]_lut_out = B1L771 & B1_count[30] & !B1L012 # !B1L771 & (B1L51);
B1_count[30] = DFFEAS(B1_count[30]_lut_out, C2_P10MHz, VCC, , , , , , );


--B1_count[29] is SetData:inst|count[29]
--operation mode is normal

B1_count[29]_lut_out = B1L71 & (!B1L771);
B1_count[29] = DFFEAS(B1_count[29]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[28] is SetData:inst|count[28]
--operation mode is normal

B1_count[28]_lut_out = B1L91 & (!B1L771);
B1_count[28] = DFFEAS(B1_count[28]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[27] is SetData:inst|count[27]
--operation mode is normal

B1_count[27]_lut_out = B1L12 & (!B1L771);
B1_count[27] = DFFEAS(B1_count[27]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L232 is SetData:inst|LessThan~4615
--operation mode is normal

B1L232 = !B1_count[30] & !B1_count[29] & !B1_count[28] & !B1_count[27];


--B1_count[26] is SetData:inst|count[26]
--operation mode is normal

B1_count[26]_lut_out = B1L32 & (!B1L771);
B1_count[26] = DFFEAS(B1_count[26]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[25] is SetData:inst|count[25]
--operation mode is normal

B1_count[25]_lut_out = B1L52 & (!B1L771);
B1_count[25] = DFFEAS(B1_count[25]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[24] is SetData:inst|count[24]
--operation mode is normal

B1_count[24]_lut_out = B1L72 & (!B1L771);
B1_count[24] = DFFEAS(B1_count[24]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[23] is SetData:inst|count[23]
--operation mode is normal

B1_count[23]_lut_out = B1L92 & (!B1L771);
B1_count[23] = DFFEAS(B1_count[23]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L332 is SetData:inst|LessThan~4616
--operation mode is normal

B1L332 = !B1_count[26] & !B1_count[25] & !B1_count[24] & !B1_count[23];


--B1_count[22] is SetData:inst|count[22]
--operation mode is normal

B1_count[22]_lut_out = B1L13 & (!B1L771);
B1_count[22] = DFFEAS(B1_count[22]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[21] is SetData:inst|count[21]
--operation mode is normal

B1_count[21]_lut_out = B1L33 & (!B1L771);
B1_count[21] = DFFEAS(B1_count[21]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[20] is SetData:inst|count[20]
--operation mode is normal

B1_count[20]_lut_out = B1L53 & (!B1L771);
B1_count[20] = DFFEAS(B1_count[20]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[19] is SetData:inst|count[19]
--operation mode is normal

B1_count[19]_lut_out = B1L73 & (!B1L771);
B1_count[19] = DFFEAS(B1_count[19]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L432 is SetData:inst|LessThan~4617
--operation mode is normal

B1L432 = !B1_count[22] & !B1_count[21] & !B1_count[20] & !B1_count[19];


--B1_count[18] is SetData:inst|count[18]
--operation mode is normal

B1_count[18]_lut_out = B1L93 & (!B1L771);
B1_count[18] = DFFEAS(B1_count[18]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[17] is SetData:inst|count[17]
--operation mode is normal

B1_count[17]_lut_out = B1L14 & (!B1L771);
B1_count[17] = DFFEAS(B1_count[17]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[16] is SetData:inst|count[16]
--operation mode is normal

B1_count[16]_lut_out = B1L34 & (!B1L771);
B1_count[16] = DFFEAS(B1_count[16]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1_count[15] is SetData:inst|count[15]
--operation mode is normal

B1_count[15]_lut_out = B1L54 & (!B1L771);
B1_count[15] = DFFEAS(B1_count[15]_lut_out, C2_P10MHz, VCC, , B1L49, , , , );


--B1L532 is SetData:inst|LessThan~4618
--operation mode is normal

B1L532 = !B1_count[18] & !B1_count[17] & !B1_count[16] & !B1_count[15];


--B1L632 is SetData:inst|LessThan~4619
--operation mode is normal