📄 test.map.qmsg
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{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "AD SetData.vhd(35) " "Warning: VHDL Signal Declaration warning at SetData.vhd(35): used explicit default value for signal \"AD\" because signal was never assigned a value" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 35 0 0 } } } 0}
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "clearAD SetData.vhd(36) " "Warning: VHDL Signal Declaration warning at SetData.vhd(36): used explicit default value for signal \"clearAD\" because signal was never assigned a value" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 36 0 0 } } } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "M10MHz M10MHz:inst2 " "Info: Elaborating entity \"M10MHz\" for hierarchy \"M10MHz:inst2\"" { } { { "test.bdf" "inst2" { Schematic "C:/Documents and Settings/mu/桌面/师兄/test/test.bdf" { { 80 -40 88 176 "inst2" "" } } } } } 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "divider M10MHz.vhd(17) " "Info: (10035) Verilog HDL or VHDL information at M10MHz.vhd(17): object \"divider\" declared but not used" { } { { "M10MHz.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/M10MHz.vhd" 17 0 0 } } } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[1\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[1\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[0\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[0\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[2\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[2\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[30\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[30\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[29\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[29\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[28\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[28\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[27\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[27\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[26\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[26\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[25\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[25\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[24\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[24\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[23\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[23\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[22\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[22\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[21\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[21\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[20\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[20\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[19\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[19\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[18\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[18\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[17\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[17\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[16\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[16\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[15\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[15\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[14\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[14\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[13\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[13\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[12\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[12\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[11\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[11\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[10\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[10\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[9\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[9\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[8\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[8\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[7\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[7\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[6\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[6\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|count_end\[4\] SetData:inst\|count_end\[31\] " "Info: Duplicate register \"SetData:inst\|count_end\[4\]\" merged to single register \"SetData:inst\|count_end\[31\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[29\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[29\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[28\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[28\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[21\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[21\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[20\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[20\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[19\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[19\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[17\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[17\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[16\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[16\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[11\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[11\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[9\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[9\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[8\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[8\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[6\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[6\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[5\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[5\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[4\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[4\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[18\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[18\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[10\] SetData:inst\|data\[30\] " "Info: Duplicate register \"SetData:inst\|data\[10\]\" merged to single register \"SetData:inst\|data\[30\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[23\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[23\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[22\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[22\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[15\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[15\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[13\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[13\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[12\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[12\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[3\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[3\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[2\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[2\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[1\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[1\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[0\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[0\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "SetData:inst\|data\[14\] SetData:inst\|data\[26\] " "Info: Duplicate register \"SetData:inst\|data\[14\]\" merged to single register \"SetData:inst\|data\[26\]\"" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0} } { } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "SetData:inst\|count_end\[31\] data_in GND " "Warning: Reduced register \"SetData:inst\|count_end\[31\]\" with stuck data_in port to stuck value GND" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "SetData:inst\|data\[30\] data_in GND " "Warning: Reduced register \"SetData:inst\|data\[30\]\" with stuck data_in port to stuck value GND" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 28 -1 0 } } } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "SetData:inst\|count_end\[5\] SetData:inst\|count_end\[3\] " "Info: Duplicate register \"SetData:inst\|count_end\[5\]\" merged to single register \"SetData:inst\|count_end\[3\]\", power-up level changed" { } { { "SetData.vhd" "" { Text "C:/Documents and Settings/mu/桌面/师兄/test/SetData.vhd" 22 -1 0 } } } 0} } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "514 " "Info: Implemented 514 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "28 " "Info: Implemented 28 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_LCELLS" "484 " "Info: Implemented 484 logic cells" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Apr 09 16:14:22 2008 " "Info: Processing ended: Wed Apr 09 16:14:22 2008" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Info: Elapsed time: 00:00:12" { } { } 0} } { } 0}
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