test.fit.rpt

利用Verilog HDL对AD7705进行控制ADC采样

; Global clocks              ; 2 / 8 ( 25 % )        ;
; LAB clocks                 ; 20 / 156 ( 12 % )     ;
; LUT chains                 ; 20 / 2,619 ( < 1 % )  ;
; Local interconnects        ; 623 / 11,506 ( 5 % )  ;
; M4K buffers                ; 0 / 468 ( 0 % )       ;
; R4s                        ; 266 / 7,520 ( 3 % )   ;
+----------------------------+-----------------------+


+---------------------------------------------------------------------------+
; LAB Logic Elements                                                        ;
+--------------------------------------------+------------------------------+
; Number of Logic Elements  (Average = 6.16) ; Number of LABs  (Total = 75) ;
+--------------------------------------------+------------------------------+
; 1                                          ; 21                           ;
; 2                                          ; 9                            ;
; 3                                          ; 0                            ;
; 4                                          ; 4                            ;
; 5                                          ; 0                            ;
; 6                                          ; 0                            ;
; 7                                          ; 1                            ;
; 8                                          ; 0                            ;
; 9                                          ; 0                            ;
; 10                                         ; 40                           ;
+--------------------------------------------+------------------------------+


+-------------------------------------------------------------------+
; LAB-wide Signals                                                  ;
+------------------------------------+------------------------------+
; LAB-wide Signals  (Average = 1.17) ; Number of LABs  (Total = 75) ;
+------------------------------------+------------------------------+
; 1 Clock                            ; 60                           ;
; 1 Clock enable                     ; 14                           ;
; 1 Sync. load                       ; 3                            ;
; 2 Clock enables                    ; 11                           ;
+------------------------------------+------------------------------+


+----------------------------------------------------------------------------+
; LAB Signals Sourced                                                        ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced  (Average = 6.45) ; Number of LABs  (Total = 75) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 21                           ;
; 2                                           ; 9                            ;
; 3                                           ; 0                            ;
; 4                                           ; 0                            ;
; 5                                           ; 4                            ;
; 6                                           ; 0                            ;
; 7                                           ; 1                            ;
; 8                                           ; 0                            ;
; 9                                           ; 0                            ;
; 10                                          ; 32                           ;
; 11                                          ; 2                            ;
; 12                                          ; 4                            ;
; 13                                          ; 0                            ;
; 14                                          ; 2                            ;
+---------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                        ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out  (Average = 4.77) ; Number of LABs  (Total = 75) ;
+-------------------------------------------------+------------------------------+
; 0                                               ; 0                            ;
; 1                                               ; 23                           ;
; 2                                               ; 8                            ;
; 3                                               ; 2                            ;
; 4                                               ; 3                            ;
; 5                                               ; 9                            ;
; 6                                               ; 4                            ;
; 7                                               ; 2                            ;
; 8                                               ; 8                            ;
; 9                                               ; 6                            ;
; 10                                              ; 10                           ;
+-------------------------------------------------+------------------------------+


+----------------------------------------------------------------------------+
; LAB Distinct Inputs                                                        ;
+---------------------------------------------+------------------------------+
; Number of Distinct Inputs  (Average = 8.51) ; Number of LABs  (Total = 75) ;
+---------------------------------------------+------------------------------+
; 0                                           ; 0                            ;
; 1                                           ; 0                            ;
; 2                                           ; 20                           ;
; 3                                           ; 0                            ;
; 4                                           ; 10                           ;
; 5                                           ; 5                            ;
; 6                                           ; 2                            ;
; 7                                           ; 3                            ;
; 8                                           ; 1                            ;
; 9                                           ; 1                            ;
; 10                                          ; 2                            ;
; 11                                          ; 7                            ;
; 12                                          ; 5                            ;
; 13                                          ; 3                            ;
; 14                                          ; 0                            ;
; 15                                          ; 1                            ;
; 16                                          ; 2                            ;
; 17                                          ; 1                            ;
; 18                                          ; 1                            ;
; 19                                          ; 0                            ;
; 20                                          ; 5                            ;
; 21                                          ; 5                            ;
+---------------------------------------------+------------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Wed Apr 09 16:14:24 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off test -c test
Info: Selected device EP1C3T100I7 for design "test"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. 
    Info: Device EP1C3T100C7 is compatible
Info: No exact pin location assignment(s) for 9 pins of 30 total pins
    Info: Pin SDO_out[23] not assigned to an exact location on the device
    Info: Pin SDO_out[22] not assigned to an exact location on the device
    Info: Pin SDO_out[21] not assigned to an exact location on the device
    Info: Pin SDO_out[20] not assigned to an exact location on the device
    Info: Pin SDO_out[19] not assigned to an exact location on the device
    Info: Pin SDO_out[18] not assigned to an exact location on the device
    Info: Pin SDO_out[17] not assigned to an exact location on the device
    Info: Pin SDO_out[16] not assigned to an exact location on the device
    Info: Pin SDO_out[4] not assigned to an exact location on the device
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info: Assuming a global fmax requirement of 1 MHz
    Info: Not setting a global tsu requirement
    Info: Not setting a global tco requirement
    Info