up3_clock.sim.rpt

用vhdl设计实现的多功能电子钟

; |UP3_CLOCK|BCD_HRD1~31                                                         ; |UP3_CLOCK|BCD_HRD1~31                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~34                                                         ; |UP3_CLOCK|BCD_HRD1~34                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~35                                                         ; |UP3_CLOCK|BCD_HRD1~35                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~38                                                         ; |UP3_CLOCK|BCD_HRD1~38                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~39                                                         ; |UP3_CLOCK|BCD_HRD1~39                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~40                                                         ; |UP3_CLOCK|BCD_HRD1~40                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~41                                                         ; |UP3_CLOCK|BCD_HRD1~41                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~42                                                         ; |UP3_CLOCK|BCD_HRD1~42                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~43                                                         ; |UP3_CLOCK|BCD_HRD1~43                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD0~38                                                         ; |UP3_CLOCK|BCD_HRD0~38                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD0~39                                                         ; |UP3_CLOCK|BCD_HRD0~39                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~44                                                         ; |UP3_CLOCK|BCD_HRD1~44                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~45                                                         ; |UP3_CLOCK|BCD_HRD1~45                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~46                                                         ; |UP3_CLOCK|BCD_HRD1~46                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~47                                                         ; |UP3_CLOCK|BCD_HRD1~47                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~50                                                         ; |UP3_CLOCK|BCD_HRD1~50                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~51                                                         ; |UP3_CLOCK|BCD_HRD1~51                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~54                                                         ; |UP3_CLOCK|BCD_HRD1~54                                                         ; out              ;
; |UP3_CLOCK|BCD_HRD1~55                                                         ; |UP3_CLOCK|BCD_HRD1~55                                                         ; out              ;
; |UP3_CLOCK|MODIFY_NEXT.modify_hour0                                            ; |UP3_CLOCK|MODIFY_NEXT.modify_hour0                                            ; regout           ;
; |UP3_CLOCK|MODIFY_STATE.modify_hour1                                           ; |UP3_CLOCK|MODIFY_STATE.modify_hour1                                           ; regout           ;
; |UP3_CLOCK|BCD_TSEC[0]                                                         ; |UP3_CLOCK|BCD_TSEC[0]                                                         ; regout           ;
; |UP3_CLOCK|BCD_HRD1[0]                                                         ; |UP3_CLOCK|BCD_HRD1[0]                                                         ; regout           ;
; |UP3_CLOCK|BCD_HRD1[1]                                                         ; |UP3_CLOCK|BCD_HRD1[1]                                                         ; regout           ;
; |UP3_CLOCK|CLK_10HZ                                                            ; |UP3_CLOCK|CLK_10HZ                                                            ; regout           ;
; |UP3_CLOCK|CLK_COUNT_10HZ[0]                                                   ; |UP3_CLOCK|CLK_COUNT_10HZ[0]                                                   ; regout           ;
; |UP3_CLOCK|CLK_COUNT_10HZ[1]                                                   ; |UP3_CLOCK|CLK_COUNT_10HZ[1]                                                   ; regout           ;
; |UP3_CLOCK|LCD_RS~reg0                                                         ; |UP3_CLOCK|LCD_RS~reg0                                                         ; regout           ;
; |UP3_CLOCK|LCD_E~reg0                                                          ; |UP3_CLOCK|LCD_E~reg0                                                          ; regout           ;
; |UP3_CLOCK|next_command.display_clear                                          ; |UP3_CLOCK|next_command.display_clear                                          ; regout           ;
; |UP3_CLOCK|next_command.display_off                                            ; |UP3_CLOCK|next_command.display_off                                            ; regout           ;
; |UP3_CLOCK|next_command.reset3                                                 ; |UP3_CLOCK|next_command.reset3                                                 ; regout           ;
; |UP3_CLOCK|next_command.return_home                                            ; |UP3_CLOCK|next_command.return_home                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char10                                           ; |UP3_CLOCK|next_command.write_char10                                           ; regout           ;
; |UP3_CLOCK|next_command.write_char9                                            ; |UP3_CLOCK|next_command.write_char9                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char8                                            ; |UP3_CLOCK|next_command.write_char8                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char7                                            ; |UP3_CLOCK|next_command.write_char7                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char6                                            ; |UP3_CLOCK|next_command.write_char6                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char5                                            ; |UP3_CLOCK|next_command.write_char5                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char4                                            ; |UP3_CLOCK|next_command.write_char4                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char3                                            ; |UP3_CLOCK|next_command.write_char3                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char2                                            ; |UP3_CLOCK|next_command.write_char2                                            ; regout           ;
; |UP3_CLOCK|next_command.write_char1                                            ; |UP3_CLOCK|next_command.write_char1                                            ; regout           ;
; |UP3_CLOCK|next_command.mode_set                                               ; |UP3_CLOCK|next_command.mode_set                                               ; regout           ;
; |UP3_CLOCK|next_command.display_on                                             ; |UP3_CLOCK|next_command.display_on                                             ; regout           ;
; |UP3_CLOCK|next_command.func_set                                               ; |UP3_CLOCK|next_command.func_set                                               ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[0]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[0]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[1]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[1]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[2]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[2]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[3]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[3]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[4]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[4]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[5]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[5]                                                   ; regout           ;
; |UP3_CLOCK|DATA_BUS_VALUE[7]                                                   ; |UP3_CLOCK|DATA_BUS_VALUE[7]                                                   ; regout           ;
; |UP3_CLOCK|state.display_clear                                                 ; |UP3_CLOCK|state.display_clear                                                 ; regout           ;
; |UP3_CLOCK|state.display_off                                                   ; |UP3_CLOCK|state.display_off                                                   ; regout           ;
; |UP3_CLOCK|state.reset3                                                        ; |UP3_CLOCK|state.reset3                                                        ; regout           ;
; |UP3_CLOCK|state.reset2                                                        ; |UP3_CLOCK|state.reset2                                                        ; regout           ;
; |UP3_CLOCK|state.toggle_e                                                      ; |UP3_CLOCK|state.toggle_e                                                      ; regout           ;
; |UP3_CLOCK|state.return_home                                                   ; |UP3_CLOCK|state.return_home                                                   ; regout           ;
; |UP3_CLOCK|state.write_char10                                                  ; |UP3_CLOCK|state.write_char10                                                  ; regout           ;
; |UP3_CLOCK|state.write_char9                                                   ; |UP3_CLOCK|state.write_char9                                                   ; regout           ;
; |UP3_CLOCK|state.write_char8                                                   ; |UP3_CLOCK|state.write_char8                                                   ; regout           ;
; |UP3_CLOCK|state.write_char7                                                   ; |UP3_CLOCK|state.write_char7                                                   ; regout           ;
; |UP3_CLOCK|state.write_char6                                                   ; |UP3_CLOCK|state.write_char6                                                   ; regout           ;
; |UP3_CLOCK|state.write_char5                                                   ; |UP3_CLOCK|state.write_char5                                                   ; regout           ;
; |UP3_CLOCK|state.write_char4                                                   ; |UP3_CLOCK|state.write_char4                                                   ; regout           ;
; |UP3_CLOCK|state.write_char3                                                   ; |UP3_CLOCK|state.write_char3                                                   ; regout           ;
; |UP3_CLOCK|state.write_char2                                                   ; |UP3_CLOCK|state.write_char2                                                   ; regout           ;
; |UP3_CLOCK|state.write_char1                                                   ; |UP3_CLOCK|state.write_char1                                                   ; regout           ;
; |UP3_CLOCK|state.mode_set                                                      ; |UP3_CLOCK|state.mode_set                                                      ; regout           ;
; |UP3_CLOCK|state.display_on                                                    ; |UP3_CLOCK|state.display_on                                                    ; regout           ;
; |UP3_CLOCK|state.func_set                                                      ; |UP3_CLOCK|state.func_set                                                      ; regout           ;
; |UP3_CLOCK|state.hold                                                          ; |UP3_CLOCK|state.hold                                                          ; regout           ;
; |UP3_CLOCK|CLK_400HZ                                                           ; |UP3_CLOCK|CLK_400HZ                                                           ; regout           ;
; |UP3_CLOCK|CLK_COUNT_400HZ[0]                                                  ; |UP3_CLOCK|CLK_COUNT_400HZ[0]                                                  ; regout           ;
; |UP3_CLOCK|CLK_COUNT_400HZ[1]                                                  ; |UP3_CLOCK|CLK_COUNT_400HZ[1]                                                  ; regout           ;
; |UP3_CLOCK|comb~0                                                              ; |UP3_CLOCK|comb~0                                                              ; out              ;
; |UP3_CLOCK|comb~1                                                              ; |UP3_CLOCK|comb~1                                                              ; out              ;
; |UP3_CLOCK|comb~2                                                              ; |UP3_CLOCK|comb~2                                                              ; out              ;
; |UP3_CLOCK|comb~3                                                              ; |UP3_CLOCK|comb~3                                                              ; out              ;
; |UP3_CLOCK|comb~4                                                              ; |UP3_CLOCK|comb~4                                                              ; out              ;
; |UP3_CLOCK|comb~5                                                              ; |UP3_CLOCK|comb~5                                                              ; out              ;
; |UP3_CLOCK|comb~7                                                              ; |UP3_CLOCK|comb~7                                                              ; out              ;
; |UP3_CLOCK|clk_48Mhz                                                           ; |UP3_CLOCK|clk_48Mhz                                                           ; out              ;
; |UP3_CLOCK|INC_CON                                                             ; |UP3_CLOCK|INC_CON                                                             ; out              ;
; |UP3_CLOCK|DEC_CON                                                             ; |UP3_CLOCK|DEC_CON                                                             ; out              ;