led.map.qmsg

是vhdl语言

{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "output\[0\] VCC " "Warning (13410): Pin \"output\[0\]\" stuck at VCC" {  } { { "led.bdf" "" { Schematic "D:/altera/72/quartus/work/counter_clk/led.bdf" { { 416 688 864 432 "output\[7..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ISCL_SCL_WANNA_REM_USR_WIRE" "" "Info: Found the following redundant logic cells in design" {  } {  } 0 0 "Found the following redundant logic cells in design" 0 0 "" 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "../../libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "IOPT_MLS_DEV_CLRN_SETS_REGISTERS" "" "Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" {  } {  } 0 0 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "" 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "15 15 " "Info: 15 registers lost all their fanouts during netlist optimizations. The first 15 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[14\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[14\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[13\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[13\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[12\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[12\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[11\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[11\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[10\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[10\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[9\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[9\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[8\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[8\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[7\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[7\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[6\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[6\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[5\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[5\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[4\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[4\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[3\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[3\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[2\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[2\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[1\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[1\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[0\] " "Info: Register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|altdpram:\\stp_non_zero_ram_gen:attribute_mem\|cells\[1\]\[0\]\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "IOPT_MLS_DEV_CLRN_SETS_REGISTERS" "" "Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" {  } {  } 0 0 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "714 " "Info: Implemented 714 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "7 " "Info: Implemented 7 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "10 " "Info: Implemented 10 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "680 " "Info: Implemented 680 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Info: Implemented 16 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 14 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 14 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "184 " "Info: Allocated 184 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jul 02 11:21:22 2008 " "Info: Processing ended: Wed Jul 02 11:21:22 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:29 " "Info: Elapsed time: 00:00:29" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}