mux64_8.tan.qmsg

等精度数字频率计 的一个工程---包括vhdl源程序和编译后产生的相关文件

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 09 10:48:12 2008 " "Info: Processing started: Fri May 09 10:48:12 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off mux64_8 -c mux64_8 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off mux64_8 -c mux64_8 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "sel\[0\] data\[4\] 11.790 ns Longest " "Info: Longest tpd from source pin \"sel\[0\]\" to destination pin \"data\[4\]\" is 11.790 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns sel\[0\] 1 PIN PIN_84 24 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_84; Fanout = 24; PIN Node = 'sel\[0\]'" {  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { sel[0] } "NODE_NAME" } } { "mux64_8.vhd" "" { Text "D:/altera/70/quartus/work/等精度频率计设计/mux模块/mux64_8.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.626 ns) + CELL(0.454 ns) 7.210 ns data~3516 2 COMB LC_X6_Y2_N0 1 " "Info: 2: + IC(5.626 ns) + CELL(0.454 ns) = 7.210 ns; Loc. = LC_X6_Y2_N0; Fanout = 1; COMB Node = 'data~3516'" {  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "6.080 ns" { sel[0] data~3516 } "NODE_NAME" } } { "mux64_8.vhd" "" { Text "D:/altera/70/quartus/work/等精度频率计设计/mux模块/mux64_8.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.326 ns) + CELL(0.088 ns) 7.624 ns data~3517 3 COMB LC_X6_Y2_N9 1 " "Info: 3: + IC(0.326 ns) + CELL(0.088 ns) = 7.624 ns; Loc. = LC_X6_Y2_N9; Fanout = 1; COMB Node = 'data~3517'" {  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.414 ns" { data~3516 data~3517 } "NODE_NAME" } } { "mux64_8.vhd" "" { Text "D:/altera/70/quartus/work/等精度频率计设计/mux模块/mux64_8.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.335 ns) + CELL(0.225 ns) 8.184 ns data~3520 4 COMB LC_X6_Y2_N7 1 " "Info: 4: + IC(0.335 ns) + CELL(0.225 ns) = 8.184 ns; Loc. = LC_X6_Y2_N7; Fanout = 1; COMB Node = 'data~3520'" {  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.560 ns" { data~3517 data~3520 } "NODE_NAME" } } { "mux64_8.vhd" "" { Text "D:/altera/70/quartus/work/等精度频率计设计/mux模块/mux64_8.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.984 ns) + CELL(1.622 ns) 11.790 ns data\[4\] 5 PIN PIN_134 0 " "Info: 5: + IC(1.984 ns) + CELL(1.622 ns) = 11.790 ns; Loc. = PIN_134; Fanout = 0; PIN Node = 'data\[4\]'" {  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "3.606 ns" { data~3520 data[4] } "NODE_NAME" } } { "mux64_8.vhd" "" { Text "D:/altera/70/quartus/work/等精度频率计设计/mux模块/mux64_8.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.519 ns ( 29.85 % ) " "Info: Total cell delay = 3.519 ns ( 29.85 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.271 ns ( 70.15 % ) " "Info: Total interconnect delay = 8.271 ns ( 70.15 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "11.790 ns" { sel[0] data~3516 data~3517 data~3520 data[4] } "NODE_NAME" } } { "d:/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/70/quartus/bin/Technology_Viewer.qrui" "11.790 ns" { sel[0] sel[0]~out0 data~3516 data~3517 data~3520 data[4] } { 0.000ns 0.000ns 5.626ns 0.326ns 0.335ns 1.984ns } { 0.000ns 1.130ns 0.454ns 0.088ns 0.225ns 1.622ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "98 " "Info: Allocated 98 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri May 09 10:48:13 2008 " "Info: Processing ended: Fri May 09 10:48:13 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}