sramtest.cr.mti

来自「FPGA的SRAM存储器的控制程序」· MTI 代码 · 共 44 行

G:/verilog/SRAMtest/SRAMtest.v {1 {vlog -work work -novopt G:/verilog/SRAMtest/SRAMtest.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module SRAMtest

Top level modules:
	SRAMtest

} {} {}} G:/verilog/SRAMtest/Reset_Delay.v {1 {vlog -work work -novopt G:/verilog/SRAMtest/Reset_Delay.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module Reset_Delay

Top level modules:
	Reset_Delay

} {} {}} G:/verilog/SRAMtest/SEG7_LUT_4.v {1 {vlog -work work -novopt G:/verilog/SRAMtest/SEG7_LUT_4.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module SEG7_LUT_4

Top level modules:
	SEG7_LUT_4

} {} {}} SRAM_16Bit_512K_tb.v {1 {vlog -work work -novopt SRAM_16Bit_512K_tb.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module SRAM_16Bit_512K_tb

Top level modules:
	SRAM_16Bit_512K_tb

} {} {}} G:/verilog/SRAMtest/SEG7_LUT.v {1 {vlog -work work -novopt G:/verilog/SRAMtest/SEG7_LUT.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module SEG7_LUT

Top level modules:
	SEG7_LUT

} {} {}} G:/verilog/SRAMtest/SRAM_16Bit_512K.v {1 {vlog -work work -novopt G:/verilog/SRAMtest/SRAM_16Bit_512K.v
Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006
-- Compiling module SRAM_16Bit_512K

Top level modules:
	SRAM_16Bit_512K

} {} {}}