config_dac.vo

Verilog实现 spi接口的FPGA实现 通过仿真

	.cout());
// synopsys translate_off
defparam \busy~reg0feeder .lut_mask = 16'hFF00;
defparam \busy~reg0feeder .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X20_Y6_N17
cycloneii_lcell_ff \busy~reg0 (
	.clk(\clk~clkctrl_outclk ),
	.datain(\busy~reg0feeder_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(\busy~reg0_regout ));

// atom is at LCCOMB_X20_Y6_N28
cycloneii_lcell_comb \spi_ncs~83 (
// Equation(s):
// \spi_ncs~83_combout  = \spi_ncs~reg0_regout  # !sck_count[0] & sck_count[1] & \main_state.STOP~regout 

	.dataa(sck_count[0]),
	.datab(sck_count[1]),
	.datac(\main_state.STOP~regout ),
	.datad(\spi_ncs~reg0_regout ),
	.cin(gnd),
	.combout(\spi_ncs~83_combout ),
	.cout());
// synopsys translate_off
defparam \spi_ncs~83 .lut_mask = 16'hFF40;
defparam \spi_ncs~83 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X20_Y6_N0
cycloneii_lcell_comb \spi_ncs~84 (
// Equation(s):
// \spi_ncs~84_combout  = \spi_ncs~83_combout  & (!\Equal1~125_combout  # !\main_state.START~regout ) # !\main_state.IDLE~regout 

	.dataa(\main_state.IDLE~regout ),
	.datab(\spi_ncs~83_combout ),
	.datac(\main_state.START~regout ),
	.datad(\Equal1~125_combout ),
	.cin(gnd),
	.combout(\spi_ncs~84_combout ),
	.cout());
// synopsys translate_off
defparam \spi_ncs~84 .lut_mask = 16'h5DDD;
defparam \spi_ncs~84 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X20_Y6_N1
cycloneii_lcell_ff \spi_ncs~reg0 (
	.clk(\clk~clkctrl_outclk ),
	.datain(\spi_ncs~84_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(\spi_ncs~reg0_regout ));

// atom is at PIN_27
cycloneii_io \wr_data[7]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\wr_data~combout [7]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(wr_data[7]));
// synopsys translate_off
defparam \wr_data[7]~I .input_async_reset = "none";
defparam \wr_data[7]~I .input_power_up = "low";
defparam \wr_data[7]~I .input_register_mode = "none";
defparam \wr_data[7]~I .input_sync_reset = "none";
defparam \wr_data[7]~I .oe_async_reset = "none";
defparam \wr_data[7]~I .oe_power_up = "low";
defparam \wr_data[7]~I .oe_register_mode = "none";
defparam \wr_data[7]~I .oe_sync_reset = "none";
defparam \wr_data[7]~I .operation_mode = "input";
defparam \wr_data[7]~I .output_async_reset = "none";
defparam \wr_data[7]~I .output_power_up = "low";
defparam \wr_data[7]~I .output_register_mode = "none";
defparam \wr_data[7]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCCOMB_X21_Y5_N20
cycloneii_lcell_comb \wdata[7]~feeder (
// Equation(s):
// \wdata[7]~feeder_combout  = \wr_data~combout [7]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\wr_data~combout [7]),
	.cin(gnd),
	.combout(\wdata[7]~feeder_combout ),
	.cout());
// synopsys translate_off
defparam \wdata[7]~feeder .lut_mask = 16'hFF00;
defparam \wdata[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X21_Y5_N21
cycloneii_lcell_ff \wdata[7] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\wdata[7]~feeder_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\wr_en~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(wdata[7]));

// atom is at LCCOMB_X22_Y6_N16
cycloneii_lcell_comb \bit_transfered~552 (
// Equation(s):
// \bit_transfered~552_combout  = \main_state.IDLE~regout  & (\main_state.START~regout  # bit_transfered[8]) # !\main_state.IDLE~regout  & \main_state.START~regout  & bit_transfered[8]

	.dataa(vcc),
	.datab(\main_state.IDLE~regout ),
	.datac(\main_state.START~regout ),
	.datad(bit_transfered[8]),
	.cin(gnd),
	.combout(\bit_transfered~552_combout ),
	.cout());
// synopsys translate_off
defparam \bit_transfered~552 .lut_mask = 16'hFCC0;
defparam \bit_transfered~552 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X22_Y6_N17
cycloneii_lcell_ff \bit_transfered[0] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\bit_transfered~552_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\bit_transfered[7]~550_combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(bit_transfered[0]));

// atom is at LCCOMB_X21_Y6_N10
cycloneii_lcell_comb \Selector2~26 (
// Equation(s):
// \Selector2~26_combout  = \main_state.START~regout  & (\Equal1~125_combout  # !bit_transfered[8] & \main_state.INSTRUCTION~regout ) # !\main_state.START~regout  & !bit_transfered[8] & \main_state.INSTRUCTION~regout 

	.dataa(\main_state.START~regout ),
	.datab(bit_transfered[8]),
	.datac(\main_state.INSTRUCTION~regout ),
	.datad(\Equal1~125_combout ),
	.cin(gnd),
	.combout(\Selector2~26_combout ),
	.cout());
// synopsys translate_off
defparam \Selector2~26 .lut_mask = 16'hBA30;
defparam \Selector2~26 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X21_Y6_N11
cycloneii_lcell_ff \main_state.INSTRUCTION (
	.clk(\clk~clkctrl_outclk ),
	.datain(\Selector2~26_combout ),
	.sdata(gnd),
	.aclr(!\resetb~clkctrl_outclk ),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(\main_state.INSTRUCTION~regout ));

// atom is at LCCOMB_X22_Y6_N0
cycloneii_lcell_comb \always9~0 (
// Equation(s):
// \always9~0_combout  = bit_transfered[0] & \main_state.INSTRUCTION~regout 

	.dataa(vcc),
	.datab(vcc),
	.datac(bit_transfered[0]),
	.datad(\main_state.INSTRUCTION~regout ),
	.cin(gnd),
	.combout(\always9~0_combout ),
	.cout());
// synopsys translate_off
defparam \always9~0 .lut_mask = 16'hF000;
defparam \always9~0 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at PIN_119
cycloneii_io \wr_data[6]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\wr_data~combout [6]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(wr_data[6]));
// synopsys translate_off
defparam \wr_data[6]~I .input_async_reset = "none";
defparam \wr_data[6]~I .input_power_up = "low";
defparam \wr_data[6]~I .input_register_mode = "none";
defparam \wr_data[6]~I .input_sync_reset = "none";
defparam \wr_data[6]~I .oe_async_reset = "none";
defparam \wr_data[6]~I .oe_power_up = "low";
defparam \wr_data[6]~I .oe_register_mode = "none";
defparam \wr_data[6]~I .oe_sync_reset = "none";
defparam \wr_data[6]~I .operation_mode = "input";
defparam \wr_data[6]~I .output_async_reset = "none";
defparam \wr_data[6]~I .output_power_up = "low";
defparam \wr_data[6]~I .output_register_mode = "none";
defparam \wr_data[6]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCCOMB_X21_Y5_N0
cycloneii_lcell_comb \wdata[6]~feeder (
// Equation(s):
// \wdata[6]~feeder_combout  = \wr_data~combout [6]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\wr_data~combout [6]),
	.cin(gnd),
	.combout(\wdata[6]~feeder_combout ),
	.cout());
// synopsys translate_off
defparam \wdata[6]~feeder .lut_mask = 16'hFF00;
defparam \wdata[6]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X21_Y5_N1
cycloneii_lcell_ff \wdata[6] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\wdata[6]~feeder_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\wr_en~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(wdata[6]));

// atom is at PIN_80
cycloneii_io \wr_data[5]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\wr_data~combout [5]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(wr_data[5]));
// synopsys translate_off
defparam \wr_data[5]~I .input_async_reset = "none";
defparam \wr_data[5]~I .input_power_up = "low";
defparam \wr_data[5]~I .input_register_mode = "none";
defparam \wr_data[5]~I .input_sync_reset = "none";
defparam \wr_data[5]~I .oe_async_reset = "none";
defparam \wr_data[5]~I .oe_power_up = "low";
defparam \wr_data[5]~I .oe_register_mode = "none";
defparam \wr_data[5]~I .oe_sync_reset = "none";
defparam \wr_data[5]~I .operation_mode = "input";
defparam \wr_data[5]~I .output_async_reset = "none";
defparam \wr_data[5]~I .output_power_up = "low";
defparam \wr_data[5]~I .output_register_mode = "none";
defparam \wr_data[5]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCFF_X21_Y5_N7
cycloneii_lcell_ff \wdata[5] (
	.clk(\clk~clkctrl_outclk ),
	.datain(gnd),
	.sdata(\wr_data~combout [5]),
	.aclr(gnd),
	.sclr(gnd),
	.sload(vcc),
	.ena(\wr_en~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(wdata[5]));

// atom is at PIN_65
cycloneii_io \wr_data[4]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\wr_data~combout [4]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(wr_data[4]));
// synopsys translate_off
defparam \wr_data[4]~I .input_async_reset = "none";
defparam \wr_data[4]~I .input_power_up = "low";
defparam \wr_data[4]~I .input_register_mode = "none";
defparam \wr_data[4]~I .input_sync_reset = "none";
defparam \wr_data[4]~I .oe_async_reset = "none";
defparam \wr_data[4]~I .oe_power_up = "low";
defparam \wr_data[4]~I .oe_register_mode = "none";
defparam \wr_data[4]~I .oe_sync_reset = "none";
defparam \wr_data[4]~I .operation_mode = "input";
defparam \wr_data[4]~I .output_async_reset = "none";
defparam \wr_data[4]~I .output_power_up = "low";
defparam \wr_data[4]~I .output_register_mode = "none";
defparam \wr_data[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCFF_X21_Y5_N13
cycloneii_lcell_ff \wdata[4] (
	.clk(\clk~clkctrl_outclk ),
	.datain(gnd),
	.sdata(\wr_data~combout [4]),
	.aclr(gnd),
	.sclr(gnd),
	.sload(vcc),
	.ena(\wr_en~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(wdata[4]));

// atom is at PIN_89
cycloneii_io \wr_data[3]~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.differentialin(gnd),
	.linkin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\wr_data~combout [3]),
	.regout(),
	.differentialout(),
	.linkout(),
	.padio(wr_data[3]));
// synopsys translate_off
defparam \wr_data[3]~I .input_async_reset = "none";
defparam \wr_data[3]~I .input_power_up = "low";
defparam \wr_data[3]~I .input_register_mode = "none";
defparam \wr_data[3]~I .input_sync_reset = "none";
defparam \wr_data[3]~I .oe_async_reset = "none";
defparam \wr_data[3]~I .oe_power_up = "low";
defparam \wr_data[3]~I .oe_register_mode = "none";
defparam \wr_data[3]~I .oe_sync_reset = "none";
defparam \wr_data[3]~I .operation_mode = "input";
defparam \wr_data[3]~I .output_async_reset = "none";
defparam \wr_data[3]~I .output_power_up = "low";
defparam \wr_data[3]~I .output_register_mode = "none";
defparam \wr_data[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at LCCOMB_X21_Y5_N22
cycloneii_lcell_comb \wdata[3]~feeder (
// Equation(s):
// \wdata[3]~feeder_combout  = \wr_data~combout [3]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\wr_data~combout [3]),
	.cin(gnd),
	.combout(\wdata[3]~feeder_combout ),
	.cout());
// synopsys translate_off
defparam \wdata[3]~feeder .lut_mask = 16'hFF00;
defparam \wdata[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCFF_X21_Y5_N23
cycloneii_lcell_ff \wdata[3] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\wdata[3]~feeder_combout ),
	.sdata(gnd),
	.aclr(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\wr_en~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(wdata[3]));

// atom is at LCCOMB_X22_Y6_N26
cycloneii_lcell_comb \always9~1 (
// Equation(s):
// \always9~1_combout  = \main_state.DATA~regout  & bit_transfered[8]

	.dataa(vcc),
	.datab(vcc),
	.datac(\main_state.DATA~regout ),
	.datad(bit_transfered[8]),
	.cin(gnd),
	.combout(\always9~1_combout ),
	.cout());
// synopsys translate_off
defparam \always9~1 .lut_mask = 16'hF000;
defparam \always9~1 .sum_lutc_input = "datac";
// synopsys translate_on

// atom is at LCCOMB_X22_Y6_N18
cycloneii_lcell_comb \data_to_send[3]~657 (
// Equation(s):
// \data_to_send[3]~657_combout  = \always9~1_combout  & (wdata[3]) # !\always9~1_combout  & data_to_send[2]

	.dataa(data_to_send[2]),
	.datab(wdata[3]),
	.datac(vcc),
	.datad(\always9~1_co