k20test.map.rpt

只需要FPGA两个通用管脚

; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 110   ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------+
; Inverted Register Statistics                     ;
+----------------------------------------+---------+
; Inverted Register                      ; Fan out ;
+----------------------------------------+---------+
; sld_hub:sld_hub_inst|hub_tdo           ; 2       ;
; Total number of inverted registers = 1 ;         ;
+----------------------------------------+---------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                                                       ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                                             ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |k20test|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[1]                                                                                                                                      ;
; 5:1                ; 5 bits    ; 15 LEs        ; 5 LEs                ; 10 LEs                 ; Yes        ; |k20test|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]                                                                                                                  ;
; 20:1               ; 4 bits    ; 52 LEs        ; 32 LEs               ; 20 LEs                 ; Yes        ; |k20test|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]                                                                                                                       ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 5:1                ; 4 bits    ; 12 LEs        ; 4 LEs                ; 8 LEs                  ; Yes        ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 16:1               ; 4 bits    ; 40 LEs        ; 16 LEs               ; 24 LEs                 ; Yes        ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                  ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr ;
+----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment           ; Value ; From ; To                                                                                                                                             ;
+----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_ROM_RECOGNITION ; OFF   ; -    ; -                                                                                                                                              ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[0]                                                                                                                                ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[1]                                                                                                                                ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[2]                                                                                                                                ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[3]                                                                                                                                ;
+----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst              ;
+------------------------------+-------+------+------------+
; Assignment                   ; Value ; From ; To         ;
+------------------------------+-------+------+------------+
; IGNORE_LCELL_BUFFERS         ; OFF   ; -    ; -          ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; OFF   ; -    ; -          ;
; NOT_GATE_PUSH_BACK           ; OFF   ; -    ; CLR_SIGNAL ;
; POWER_UP_LEVEL               ; LOW   ; -    ; CLR_SIGNAL ;
+------------------------------+-------+------+------------+


+---------------------------------------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine ;
+----------------+-------+------+-------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                    ;
+----------------+-------+------+-------------------------------------------------------+
; POWER_UP_LEVEL ; Low   ; -    ; state[0]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[1]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[2]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[3]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[4]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[5]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[6]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[7]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[8]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[9]                                              ;
; POWER_UP_LEVEL ; Low   ; -    ; state[10]                                             ;
; POWER_UP_LEVEL ; Low   ; -    ; state[11]                                             ;
; POWER_UP_LEVEL ; Low   ; -    ; state[12]                                             ;
; POWER_UP_LEVEL ; Low   ; -    ; state[13]                                             ;
; POWER_UP_LEVEL ; Low   ; -    ; state[14]                                             ;
; POWER_UP_LEVEL ; Low   ; -    ; state[15]                                             ;
+----------------+-------+------+-------------------------------------------------------+


+---------------------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG ;
+----------------------+-------+------+-------------------------------+
; Assignment           ; Value ; From ; To                            ;
+----------------------+-------+------+-------------------------------+
; AUTO_ROM_RECOGNITION ; OFF   ; -    ; -                             ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[0]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[1]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[2]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[3]               ;
; POWER_UP_LEVEL       ; Low   ; -    ; word_counter[4]               ;
+----------------------+-------+------+-------------------------------+


+----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: TENBASET_TxD:inst ;
+-------------------+----------------------------------+---------+
; Parameter Name    ; Value                            ; Type    ;
+-------------------+----------------------------------+---------+
; IPsource_1        ; 202                              ; Untyped ;
; IPsource_2        ; 114                              ; Untyped ;
; IPsource_3        ; 251                              ; Untyped ;
; IPsource_4        ; 137                              ; Untyped ;
; IPdestination_1   ; 202                              ; Untyped ;
; IPdestination_2   ; 114                              ; Untyped ;
; IPdestination_3   ; 251                              ; Untyped ;
; IPdestination_4   ; 255                              ; Untyped ;
; PhysicalAddress_1 ; 00000000                         ; Binary  ;
; PhysicalAddress_2 ; 01000000                         ; Binary  ;
; PhysicalAddress_3 ; 11010000                         ; Binary  ;
; PhysicalAddress_4 ; 10010001                         ; Binary  ;
; PhysicalAddress_5 ; 01110110                         ; Binary  ;
; PhysicalAddress_6 ; 01110101                         ; Binary  ;
; IPchecksum1       ; 00000000000001000101000110101011 ; Binary  ;
; IPchecksum2       ; 00000000000000000101000110101111 ; Binary  ;
; IPchecksum3       ; 11111111111111111010111001010000 ; Binary  ;