k20test.map.rpt
来自「只需要FPGA两个通用管脚」· RPT 代码 · 共 619 行 · 第 1/5 页
RPT
619 行
; Retiming Meta-Stability Register Sequence Length ; 2 ; 2 ;
; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
; HDL message level ; Level2 ; Level2 ;
+--------------------------------------------------------------------+--------------------+--------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------------+-------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------------+-------------------------------------------------------------------+
; k20test.v ; yes ; User Verilog HDL File ; F:/NIOS2/k21test/k20test.v ;
; k20test.bdf ; yes ; User Block Diagram/Schematic File ; F:/NIOS2/k21test/k20test.bdf ;
; altpll0.tdf ; yes ; Other ; F:/NIOS2/k21test/altpll0.tdf ;
; altpll.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altpll.inc ;
; altpll.tdf ; yes ; Megafunction ; f:/altera/quartus60/libraries/megafunctions/altpll.tdf ;
; aglobal60.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/aglobal60.inc ;
; stratix_pll.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/stratix_pll.inc ;
; stratixii_pll.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/stratixii_pll.inc ;
; cycloneii_pll.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/cycloneii_pll.inc ;
; lpm_rom0.tdf ; yes ; Other ; F:/NIOS2/k21test/lpm_rom0.tdf ;
; altsyncram.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altsyncram.inc ;
; altsyncram.tdf ; yes ; Megafunction ; f:/altera/quartus60/libraries/megafunctions/altsyncram.tdf ;
; stratix_ram_block.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/lpm_decode.inc ;
; a_rdenreg.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_q491.tdf ; yes ; Auto-Generated Megafunction ; F:/NIOS2/k21test/db/altsyncram_q491.tdf ;
; db/altsyncram_uqe2.tdf ; yes ; Auto-Generated Megafunction ; F:/NIOS2/k21test/db/altsyncram_uqe2.tdf ;
; sld_mod_ram_rom.vhd ; yes ; Encrypted Megafunction ; f:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd ;
; sld_rom_sr.vhd ; yes ; Encrypted Megafunction ; f:/altera/quartus60/libraries/megafunctions/sld_rom_sr.vhd ;
; sld_hub.vhd ; yes ; Encrypted Megafunction ; f:/altera/quartus60/libraries/megafunctions/sld_hub.vhd ;
; lpm_shiftreg.tdf ; yes ; Megafunction ; f:/altera/quartus60/libraries/megafunctions/lpm_shiftreg.tdf ;
; lpm_constant.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/lpm_constant.inc ;
; dffeea.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/dffeea.inc ;
; lpm_decode.tdf ; yes ; Megafunction ; f:/altera/quartus60/libraries/megafunctions/lpm_decode.tdf ;
; declut.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/declut.inc ;
; altshift.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/altshift.inc ;
; lpm_compare.inc ; yes ; Other ; f:/altera/quartus60/libraries/megafunctions/lpm_compare.inc ;
; db/decode_aoi.tdf ; yes ; Auto-Generated Megafunction ; F:/NIOS2/k21test/db/decode_aoi.tdf ;
; sld_dffex.vhd ; yes ; Encrypted Megafunction ; f:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd ;
+----------------------------------+-----------------+------------------------------------+-------------------------------------------------------------------+
+------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+--------------------------+
; Resource ; Usage ;
+---------------------------------------------+--------------------------+
; Estimated Total logic elements ; 276 ;
; Total combinational functions ; 276 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 97 ;
; -- 3 input functions ; 57 ;
; -- <=2 input functions ; 122 ;
; -- Combinational cells for routing ; 0 ;
; Logic elements by mode ; ;
; -- normal mode ; 218 ;
; -- arithmetic mode ; 58 ;
; Total registers ; 216 ;
; I/O pins ; 6 ;
; Total memory bits ; 1024 ;
; Total PLLs ; 1 ;
; Maximum fan-out node ; altera_internal_jtag~TDO ;
; Maximum fan-out ; 133 ;
; Total fan-out ; 1599 ;
; Average fan-out ; 3.15 ;
+---------------------------------------------+--------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+------------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ;
+------------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; |k20test ; 276 (0) ; 216 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 6 ; 0 ; |k20test ;
; |TENBASET_TxD:inst| ; 134 (134) ; 113 (113) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|TENBASET_TxD:inst ;
; |altpll0:inst1| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|altpll0:inst1 ;
; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|altpll0:inst1|altpll:altpll_component ;
; |lpm_rom0:inst3| ; 48 (0) ; 33 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3 ;
; |altsyncram:altsyncram_component| ; 48 (0) ; 33 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component ;
; |altsyncram_q491:auto_generated| ; 48 (0) ; 33 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated ;
; |altsyncram_uqe2:altsyncram1| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1 ;
; |sld_mod_ram_rom:mgl_prim2| ; 48 (33) ; 33 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2 ;
; |sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr| ; 15 (15) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr ;
; |sld_hub:sld_hub_inst| ; 94 (39) ; 70 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst ;
; |lpm_decode:instruction_decoder| ; 5 (0) ; 5 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder ;
; |decode_aoi:auto_generated| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_aoi:auto_generated ;
; |lpm_shiftreg:jtag_ir_register| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register ;
; |sld_dffex:BROADCAST| ; 2 (2) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:BROADCAST ;
; |sld_dffex:IRF_ENA_0| ; 1 (1) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0 ;
; |sld_dffex:IRF_ENA| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA ;
; |sld_dffex:IRSR| ; 3 (3) ; 6 (6) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:IRSR ;
; |sld_dffex:RESET| ; 2 (2) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:RESET ;
; |sld_dffex:\GEN_IRF:1:IRF| ; 1 (1) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF ;
; |sld_dffex:\GEN_SHADOW_IRF:1:S_IRF| ; 0 (0) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF ;
; |sld_jtag_state_machine:jtag_state_machine| ; 20 (20) ; 19 (19) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine ;
; |sld_rom_sr:HUB_INFO_REG| ; 21 (21) ; 9 (9) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |k20test|sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG ;
+------------------------------------------------------------------------+-------------------+--------------+-------------+------+--------------+---------+-----------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+----------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+-------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+----------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+-------------+
; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|ALTSYNCRAM ; AUTO ; True Dual Port ; 128 ; 8 ; 128 ; 8 ; 1024 ; k20test.mif ;
+----------------------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+-------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 216 ;
; Number of registers using Synchronous Clear ; 43 ;
; Number of registers using Synchronous Load ; 20 ;
; Number of registers using Asynchronous Clear ; 55 ;
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