soundsample.tan.qmsg

语音采集,直接在QUARTUSII中打开调试.

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "WREN register COUNTER:inst1\|CQI\[13\] memory soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11 121.8 MHz 8.21 ns Internal " "Info: Clock \"WREN\" has Internal fmax of 121.8 MHz between source register \"COUNTER:inst1\|CQI\[13\]\" and destination memory \"soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11\" (period= 8.21 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.808 ns + Longest register memory " "Info: + Longest register to memory delay is 7.808 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns COUNTER:inst1\|CQI\[13\] 1 REG LC_X15_Y13_N6 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X15_Y13_N6; Fanout = 10; REG Node = 'COUNTER:inst1\|CQI\[13\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "" { COUNTER:inst1|CQI[13] } "NODE_NAME" } "" } } { "COUNTER.vhd" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/COUNTER.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.310 ns) + CELL(0.590 ns) 1.900 ns soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|decode_iga:decode3\|w_anode221w\[2\]~10 2 COMB LC_X16_Y13_N0 112 " "Info: 2: + IC(1.310 ns) + CELL(0.590 ns) = 1.900 ns; Loc. = LC_X16_Y13_N0; Fanout = 112; COMB Node = 'soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|decode_iga:decode3\|w_anode221w\[2\]~10'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "1.900 ns" { COUNTER:inst1|CQI[13] soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 } "NODE_NAME" } "" } } { "db/decode_iga.tdf" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/decode_iga.tdf" 33 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.943 ns) + CELL(0.965 ns) 7.808 ns soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11 3 MEM M4K_X33_Y8 1 " "Info: 3: + IC(4.943 ns) + CELL(0.965 ns) = 7.808 ns; Loc. = M4K_X33_Y8; Fanout = 1; MEM Node = 'soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "5.908 ns" { soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "db/altsyncram_i041.tdf" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/altsyncram_i041.tdf" 53 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.555 ns ( 19.92 % ) " "Info: Total cell delay = 1.555 ns ( 19.92 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.253 ns ( 80.08 % ) " "Info: Total interconnect delay = 6.253 ns ( 80.08 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "7.808 ns" { COUNTER:inst1|CQI[13] soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.808 ns" { COUNTER:inst1|CQI[13] soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } { 0.000ns 1.310ns 4.943ns } { 0.000ns 0.590ns 0.965ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.085 ns - Smallest " "Info: - Smallest clock skew is -0.085 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "WREN destination 9.804 ns + Shortest memory " "Info: + Shortest clock path from clock \"WREN\" to destination memory is 9.804 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns WREN 1 CLK PIN_45 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_45; Fanout = 5; CLK Node = 'WREN'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "" { WREN } "NODE_NAME" } "" } } { "soundsample.bdf" "" { Schematic "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/soundsample.bdf" { { 232 -168 0 248 "WREN" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.987 ns) + CELL(0.442 ns) 4.898 ns COUNTER:inst1\|CLKOUT~7 2 COMB LC_X15_Y13_N7 496 " "Info: 2: + IC(2.987 ns) + CELL(0.442 ns) = 4.898 ns; Loc. = LC_X15_Y13_N7; Fanout = 496; COMB Node = 'COUNTER:inst1\|CLKOUT~7'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "3.429 ns" { WREN COUNTER:inst1|CLKOUT~7 } "NODE_NAME" } "" } } { "COUNTER.vhd" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/COUNTER.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.184 ns) + CELL(0.722 ns) 9.804 ns soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11 3 MEM M4K_X33_Y8 1 " "Info: 3: + IC(4.184 ns) + CELL(0.722 ns) = 9.804 ns; Loc. = M4K_X33_Y8; Fanout = 1; MEM Node = 'soundram:inst\|altsyncram:altsyncram_component\|altsyncram_i041:auto_generated\|ram_block1a0~porta_address_reg11'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "4.906 ns" { COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "db/altsyncram_i041.tdf" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/altsyncram_i041.tdf" 53 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.633 ns ( 26.86 % ) " "Info: Total cell delay = 2.633 ns ( 26.86 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.171 ns ( 73.14 % ) " "Info: Total interconnect delay = 7.171 ns ( 73.14 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.804 ns" { WREN COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.804 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } { 0.000ns 0.000ns 2.987ns 4.184ns } { 0.000ns 1.469ns 0.442ns 0.722ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "WREN source 9.889 ns - Longest register " "Info: - Longest clock path from clock \"WREN\" to source register is 9.889 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns WREN 1 CLK PIN_45 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_45; Fanout = 5; CLK Node = 'WREN'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "" { WREN } "NODE_NAME" } "" } } { "soundsample.bdf" "" { Schematic "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/soundsample.bdf" { { 232 -168 0 248 "WREN" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.987 ns) + CELL(0.442 ns) 4.898 ns COUNTER:inst1\|CLKOUT~7 2 COMB LC_X15_Y13_N7 496 " "Info: 2: + IC(2.987 ns) + CELL(0.442 ns) = 4.898 ns; Loc. = LC_X15_Y13_N7; Fanout = 496; COMB Node = 'COUNTER:inst1\|CLKOUT~7'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "3.429 ns" { WREN COUNTER:inst1|CLKOUT~7 } "NODE_NAME" } "" } } { "COUNTER.vhd" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/COUNTER.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.280 ns) + CELL(0.711 ns) 9.889 ns COUNTER:inst1\|CQI\[13\] 3 REG LC_X15_Y13_N6 10 " "Info: 3: + IC(4.280 ns) + CELL(0.711 ns) = 9.889 ns; Loc. = LC_X15_Y13_N6; Fanout = 10; REG Node = 'COUNTER:inst1\|CQI\[13\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "4.991 ns" { COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } "NODE_NAME" } "" } } { "COUNTER.vhd" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/COUNTER.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.622 ns ( 26.51 % ) " "Info: Total cell delay = 2.622 ns ( 26.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.267 ns ( 73.49 % ) " "Info: Total interconnect delay = 7.267 ns ( 73.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.889 ns" { WREN COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.889 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } { 0.000ns 0.000ns 2.987ns 4.280ns } { 0.000ns 1.469ns 0.442ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.804 ns" { WREN COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.804 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } { 0.000ns 0.000ns 2.987ns 4.184ns } { 0.000ns 1.469ns 0.442ns 0.722ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.889 ns" { WREN COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.889 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } { 0.000ns 0.000ns 2.987ns 4.280ns } { 0.000ns 1.469ns 0.442ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "COUNTER.vhd" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/COUNTER.vhd" 18 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_i041.tdf" "" { Text "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/altsyncram_i041.tdf" 53 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "7.808 ns" { COUNTER:inst1|CQI[13] soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.808 ns" { COUNTER:inst1|CQI[13] soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } { 0.000ns 1.310ns 4.943ns } { 0.000ns 0.590ns 0.965ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.804 ns" { WREN COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.804 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|ram_block1a0~porta_address_reg11 } { 0.000ns 0.000ns 2.987ns 4.184ns } { 0.000ns 1.469ns 0.442ns 0.722ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "soundsample" "UNKNOWN" "V1" "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/db/soundsample.quartus_db" { Floorplan "G:/lzh/教学资料/实验/PLD_EXAM/peixun/soundsample/" "" "9.889 ns" { WREN COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "9.889 ns" { WREN WREN~out0 COUNTER:inst1|CLKOUT~7 COUNTER:inst1|CQI[13] } { 0.000ns 0.000ns 2.987ns 4.280ns } { 0.000ns 1.469ns 0.442ns 0.711ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "CLK 40 " "Warning: Circuit may not operate. Detected 40 non-operational path(s) clocked by clock \"CLK\" with clock skew larger than data delay. See Compilation Report for details." {  } {  } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0}