top_modelsim.xrf

ddr2 controller功能控制,里面有四个模块

instance = net, DQ_a35_a_apadio, DQ[35], top, 1
instance = net, DQ_a34_a_apadio, DQ[34], top, 1
instance = net, DQ_a33_a_apadio, DQ[33], top, 1
instance = net, DQ_a32_a_apadio, DQ[32], top, 1
instance = net, DQ_a31_a_apadio, DQ[31], top, 1
instance = net, DQ_a30_a_apadio, DQ[30], top, 1
instance = net, DQ_a29_a_apadio, DQ[29], top, 1
instance = net, DQ_a28_a_apadio, DQ[28], top, 1
instance = net, DQ_a27_a_apadio, DQ[27], top, 1
instance = net, DQ_a26_a_apadio, DQ[26], top, 1
instance = net, DQ_a25_a_apadio, DQ[25], top, 1
instance = net, DQ_a24_a_apadio, DQ[24], top, 1
instance = net, DQ_a23_a_apadio, DQ[23], top, 1
instance = net, DQ_a22_a_apadio, DQ[22], top, 1
instance = net, DQ_a21_a_apadio, DQ[21], top, 1
instance = net, DQ_a20_a_apadio, DQ[20], top, 1
instance = net, DQ_a19_a_apadio, DQ[19], top, 1
instance = net, DQ_a18_a_apadio, DQ[18], top, 1
instance = net, DQ_a17_a_apadio, DQ[17], top, 1
instance = net, DQ_a16_a_apadio, DQ[16], top, 1
instance = net, DQ_a15_a_apadio, DQ[15], top, 1
instance = net, DQ_a14_a_apadio, DQ[14], top, 1
instance = net, DQ_a13_a_apadio, DQ[13], top, 1
instance = net, DQ_a12_a_apadio, DQ[12], top, 1
instance = net, DQ_a11_a_apadio, DQ[11], top, 1
instance = net, DQ_a10_a_apadio, DQ[10], top, 1
instance = net, DQ_a9_a_apadio, DQ[9], top, 1
instance = net, DQ_a8_a_apadio, DQ[8], top, 1
instance = net, DQ_a7_a_apadio, DQ[7], top, 1
instance = net, DQ_a6_a_apadio, DQ[6], top, 1
instance = net, DQ_a5_a_apadio, DQ[5], top, 1
instance = net, DQ_a4_a_apadio, DQ[4], top, 1
instance = net, DQ_a3_a_apadio, DQ[3], top, 1
instance = net, DQ_a2_a_apadio, DQ[2], top, 1
instance = net, DQ_a1_a_apadio, DQ[1], top, 1
instance = net, DQ_a0_a_apadio, DQ[0], top, 1
instance = net, RW_N_apadio, RW_N, top, 1
instance = net, ADV_LD_N_apadio, ADV_LD_N, top, 1
instance = net, BW_N_a3_a_apadio, BW_N[3], top, 1
instance = net, BW_N_a2_a_apadio, BW_N[2], top, 1
instance = net, BW_N_a1_a_apadio, BW_N[1], top, 1
instance = net, BW_N_a0_a_apadio, BW_N[0], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a34_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[34]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a28_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[28]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a23_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[23]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a22_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[22]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a0_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[0]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a26_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[26]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a31_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[31]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a14_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[14]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a16_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[16]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a11_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[11]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a9_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[9]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a35_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[35]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a10_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[10]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a21_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[21]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a6_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[6]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a3_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[3]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a33_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[33]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a30_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[30]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a24_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[24]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a2_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[2]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a1_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[1]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a27_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[27]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a25_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[25]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a32_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[32]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a18_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[18]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a15_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[15]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a29_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[29]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a12_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[12]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a8_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[8]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a20_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[20]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a7_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[7]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a17_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[17]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a13_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[13]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a5_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[5]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a4_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[4]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_alb_data_out_a19_a_areg0, zbt_ctrl_top_inst1|pipe_delay1|lb_data_out[19]~reg0, top, 1
instance = net, clk_acombout, clk, top, 1
instance = net, PLL1_inst_aaltpll_component_a_clk0, PLL1_inst|altpll_component|_clk0, top, 1
instance = net, DM_a2_a_acombout, DM[2], top, 1
instance = net, RESET_N_acombout, RESET_N, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adm_reg_a2_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|dm_reg[2]~reg0, top, 1
instance = net, DM_a0_a_acombout, DM[0], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adm_reg_a0_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|dm_reg[0]~reg0, top, 1
instance = net, DM_a3_a_acombout, DM[3], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adm_reg_a3_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|dm_reg[3]~reg0, top, 1
instance = net, DM_a1_a_acombout, DM[1], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adm_reg_a1_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|dm_reg[1]~reg0, top, 1
instance = net, DATA_IN_a34_a_acombout, DATA_IN[34], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a34_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[34]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a34_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][34], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a34_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][34], top, 1
instance = net, RD_WR_N_acombout, RD_WR_N, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_ard_wr_n_reg_areg0, zbt_ctrl_top_inst1|pipe_stage1|rd_wr_n_reg~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_arw_n_pipe_a0_a, zbt_ctrl_top_inst1|pipe_delay1|rw_n_pipe[0], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_arw_n_pipe_a1_a, zbt_ctrl_top_inst1|pipe_delay1|rw_n_pipe[1], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_arw_n_pipe_a2_a, zbt_ctrl_top_inst1|pipe_delay1|rw_n_pipe[2], top, 1
instance = net, DATA_IN_a28_a_acombout, DATA_IN[28], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a28_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[28]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a28_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][28], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a28_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][28], top, 1
instance = net, DATA_IN_a23_a_acombout, DATA_IN[23], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a23_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[23]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a23_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][23], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a23_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][23], top, 1
instance = net, DATA_IN_a22_a_acombout, DATA_IN[22], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a22_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[22]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a22_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][22], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a22_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][22], top, 1
instance = net, DATA_IN_a0_a_acombout, DATA_IN[0], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a0_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[0]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a0_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][0], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a0_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][0], top, 1
instance = net, DATA_IN_a26_a_acombout, DATA_IN[26], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a26_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[26]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a26_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][26], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a26_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][26], top, 1
instance = net, DATA_IN_a31_a_acombout, DATA_IN[31], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a31_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[31]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a31_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][31], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a31_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][31], top, 1
instance = net, DATA_IN_a14_a_acombout, DATA_IN[14], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a14_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[14]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a14_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][14], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a14_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][14], top, 1
instance = net, DATA_IN_a16_a_acombout, DATA_IN[16], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a16_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[16]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a16_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][16], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a1_a_a16_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[1][16], top, 1
instance = net, DATA_IN_a11_a_acombout, DATA_IN[11], top, 1
instance = net, zbt_ctrl_top_inst1_apipe_stage1_adata_in_reg_a11_a_areg0, zbt_ctrl_top_inst1|pipe_stage1|data_in_reg[11]~reg0, top, 1
instance = net, zbt_ctrl_top_inst1_apipe_delay1_adata_in_pipe_a0_a_a11_a, zbt_ctrl_top_inst1|pipe_delay1|data_in_pipe[0][11], top, 1