traffic.rpt

交通灯控制器的VHDL设计,能控制十字路口的红绿灯转换,通过目标芯片EPF10KLC84-4验证

Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      3/24( 12%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
02:      3/24( 12%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
03:      5/24( 20%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
04:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
05:      0/24(  0%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
06:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
07:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
12:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
13:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
14:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
15:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
16:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
17:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
18:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
19:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
20:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
21:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
22:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
23:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
24:      2/24(  8%)     0/4(  0%)      2/4( 50%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                    d:\biyesheji\jtdkz\traffic.rpt
traffic

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       22         clk
LCELL       22         |LEDCONTROL:1|:608
LCELL       16         |CONTROL:18|:141


Device-Specific Information:                    d:\biyesheji\jtdkz\traffic.rpt
traffic

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT       10         reset


Device-Specific Information:                    d:\biyesheji\jtdkz\traffic.rpt
traffic

** EQUATIONS **

clk      : INPUT;
reset    : INPUT;
urgen    : INPUT;

-- Node name is 'duan0' 
-- Equation name is 'duan0', type is output 
duan0    =  GND;

-- Node name is 'duan1' 
-- Equation name is 'duan1', type is output 
duan1    =  _LC6_B4;

-- Node name is 'duan2' 
-- Equation name is 'duan2', type is output 
duan2    =  _LC1_B4;

-- Node name is 'duan3' 
-- Equation name is 'duan3', type is output 
duan3    =  _LC8_B4;

-- Node name is 'duan4' 
-- Equation name is 'duan4', type is output 
duan4    =  _LC7_B1;

-- Node name is 'duan5' 
-- Equation name is 'duan5', type is output 
duan5    =  _LC5_B1;

-- Node name is 'duan6' 
-- Equation name is 'duan6', type is output 
duan6    =  _LC3_B1;

-- Node name is 'duan7' 
-- Equation name is 'duan7', type is output 
duan7    =  _LC1_B2;

-- Node name is 'g1' 
-- Equation name is 'g1', type is output 
g1       =  _LC8_B17;

-- Node name is 'g2' 
-- Equation name is 'g2', type is output 
g2       =  _LC5_B17;

-- Node name is 'reset~1' 
-- Equation name is 'reset~1', location is LC8_C2, type is buried.
-- synthesized logic cell 
!_LC8_C2 = _LC8_C2~NOT;
_LC8_C2~NOT = LCELL(!reset);

-- Node name is 'r1' 
-- Equation name is 'r1', type is output 
r1       =  _LC4_B17;

-- Node name is 'r2' 
-- Equation name is 'r2', type is output 
r2       =  _LC1_B19;

-- Node name is 'wei0' 
-- Equation name is 'wei0', type is output 
wei0     =  _LC2_B8;

-- Node name is 'wei1' 
-- Equation name is 'wei1', type is output 
wei1     =  _LC1_B15;

-- Node name is 'wei2' 
-- Equation name is 'wei2', type is output 
wei2     =  _LC7_B24;

-- Node name is 'wei3' 
-- Equation name is 'wei3', type is output 
wei3     =  _LC6_B24;

-- Node name is 'wei4' 
-- Equation name is 'wei4', type is output 
wei4     =  _LC4_B24;

-- Node name is 'wei5' 
-- Equation name is 'wei5', type is output 
wei5     =  _LC4_B21;

-- Node name is 'wei6' 
-- Equation name is 'wei6', type is output 
wei6     =  _LC5_B14;

-- Node name is 'wei7' 
-- Equation name is 'wei7', type is output 
wei7     =  _LC8_B12;

-- Node name is 'y1' 
-- Equation name is 'y1', type is output 
y1       =  _LC6_B17;

-- Node name is 'y2' 
-- Equation name is 'y2', type is output 
y2       =  _LC2_B19;

-- Node name is '|CONTROL:18|:6' = '|CONTROL:18|count0' 
-- Equation name is '_LC7_C8', type is buried 
_LC7_C8  = DFFE(!_LC7_C8, GLOBAL( clk),  VCC,  VCC,  VCC);

-- Node name is '|CONTROL:18|:5' = '|CONTROL:18|count1' 
-- Equation name is '_LC6_C8', type is buried 
_LC6_C8  = DFFE( _EQ001, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ001 = !_LC1_C8 & !_LC6_C8 &  _LC7_C8
         # !_LC1_C8 &  _LC6_C8 & !_LC7_C8;

-- Node name is '|CONTROL:18|:4' = '|CONTROL:18|count2' 
-- Equation name is '_LC5_C8', type is buried 
_LC5_C8  = DFFE( _EQ002, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ002 = !_LC1_C8 &  _LC5_C8 & !_LC7_C8
         # !_LC1_C8 &  _LC5_C8 & !_LC6_C8
         # !_LC1_C8 & !_LC5_C8 &  _LC6_C8 &  _LC7_C8;

-- Node name is '|CONTROL:18|:3' = '|CONTROL:18|count3' 
-- Equation name is '_LC4_C8', type is buried 
_LC4_C8  = DFFE( _EQ003, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ003 =  _LC4_C8 & !_LC7_C8
         # !_LC4_C8 &  _LC5_C8 &  _LC6_C8 &  _LC7_C8
         #  _LC4_C8 & !_LC5_C8 &  _LC6_C8
         #  _LC4_C8 &  _LC5_C8 & !_LC6_C8;

-- Node name is '|CONTROL:18|:141' 
-- Equation name is '_LC1_C8', type is buried 
_LC1_C8  = LCELL( _EQ004);
  _EQ004 =  _LC4_C8 & !_LC5_C8 & !_LC6_C8 &  _LC7_C8;

-- Node name is '|LEDCONTROL:1|:19' = '|LEDCONTROL:1|count0' 
-- Equation name is '_LC3_C10', type is buried 
_LC3_C10 = DFFE( _EQ005,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ005 =  _LC4_C10 & !urgen
         #  _LC1_C11 & !urgen
         # !_LC1_C11 &  _LC5_C10 &  urgen;

-- Node name is '|LEDCONTROL:1|:18' = '|LEDCONTROL:1|count1' 
-- Equation name is '_LC2_C10', type is buried 
_LC2_C10 = DFFE( _EQ006,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ006 = !_LC1_C11 &  _LC6_C10 & !urgen
         # !_LC1_C11 &  _LC8_C10;

-- Node name is '|LEDCONTROL:1|:17' = '|LEDCONTROL:1|count2' 
-- Equation name is '_LC8_C5', type is buried 
_LC8_C5  = DFFE( _EQ007,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ007 = !_LC1_C11 &  _LC3_C3 &  _LC5_C5
         # !_LC1_C11 &  _LC3_C7 &  _LC5_C5;

-- Node name is '|LEDCONTROL:1|:16' = '|LEDCONTROL:1|count3' 
-- Equation name is '_LC4_C7', type is buried 
_LC4_C7  = DFFE( _EQ008,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ008 =  _LC2_C11 &  _LC4_C7 &  urgen
         #  _LC2_C11 &  _LC4_C7 & !_LC7_C5
         #  _LC2_C11 & !_LC4_C7 &  _LC7_C5 & !urgen;

-- Node name is '|LEDCONTROL:1|:15' = '|LEDCONTROL:1|count4' 
-- Equation name is '_LC2_C8', type is buried 
_LC2_C8  = DFFE( _EQ009,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ009 =  _LC1_C10 &  _LC3_C3 &  _LC3_C8;

-- Node name is '|LEDCONTROL:1|:14' = '|LEDCONTROL:1|count5' 
-- Equation name is '_LC5_C7', type is buried 
_LC5_C7  = DFFE( _EQ010,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ010 =  _LC2_C11 &  _LC5_C7 &  urgen
         #  _LC2_C11 &  _LC5_C7 & !_LC6_C7
         #  _LC2_C11 & !_LC5_C7 &  _LC6_C7 & !urgen;

-- Node name is '|LEDCONTROL:1|:13' = '|LEDCONTROL:1|count6' 
-- Equation name is '_LC8_C7', type is buried 
_LC8_C7  = DFFE( _EQ011,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ011 =  _LC1_C10 &  _LC3_C3 &  _LC7_C7;

-- Node name is '|LEDCONTROL:1|LPM_ADD_SUB:148|addcore:adder|:71' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_C5', type is buried 
_LC7_C5  = LCELL( _EQ012);
  _EQ012 =  _LC2_C10 &  _LC3_C10 &  _LC8_C5;

-- Node name is '|LEDCONTROL:1|LPM_ADD_SUB:148|addcore:adder|:79' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_C7', type is buried 
_LC6_C7  = LCELL( _EQ013);
  _EQ013 =  _LC2_C8 &  _LC4_C7 &  _LC7_C5;

-- Node name is '|LEDCONTROL:1|:20' = '|LEDCONTROL:1|subtemp' 
-- Equation name is '_LC3_C2', type is buried 
_LC3_C2  = DFFE(!urgen,  _LC1_C8,  VCC,  VCC, !_LC8_C2);

-- Node name is '|LEDCONTROL:1|:4' 
-- Equation name is '_LC4_C3', type is buried 
_LC4_C3  = DFFE( _EQ014,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ014 = !_LC3_C11 &  _LC4_C3 & !_LC5_C11
         #  _LC2_C3 & !_LC3_C11 & !_LC5_C11;

-- Node name is '|LEDCONTROL:1|:6' 
-- Equation name is '_LC6_C3', type is buried 
_LC6_C3  = DFFE( _EQ015,  _LC1_C8, !reset,  VCC,  VCC);
  _EQ015 = !_LC3_C7 & !_LC5_C11 &  _LC7_C3
         #  _LC3_C11 & !_LC5_C11;

-- Node name is '|LEDCONTROL:1|:9' 
-- Equation name is '_LC2_C2', type is buried 
_LC2_C2  = DFFE( _EQ016,  _LC1_C8,  VCC,  VCC, !_LC8_C2);
  _EQ016 =  _LC1_C3 &  _LC2_C2
         # !_LC1_C10;

-- Node name is '|LEDCONTROL:1|:11' 
-- Equation name is '_LC8_C3', type is buried 
_LC8_C3  = DFFE( _EQ017,  _LC1_C8,  VCC,  VCC, !_LC8_C2);
  _EQ017 =  _LC2_C3 & !_LC3_C11
         #  _LC5_C3;

-- Node name is '|LEDCONTROL:1|:176' 
-- Equation name is '_LC7_C7', type is buried 
_LC7_C7  = LCELL( _EQ018);
  _EQ018 = !_LC5_C7 &  _LC8_C7
         # !_LC6_C7 &  _LC8_C7
         #  _LC5_C7 &  _LC6_C7 & !_LC8_C7 & !urgen
         #  _LC8_C7 &  urgen;

-- Node name is '|LEDCONTROL:1|:188' 
-- Equation name is '_LC3_C8', type is buried 
_LC3_C8  = LCELL( _EQ019);
  _EQ019 =  _LC2_C8 & !_LC4_C7
         #  _LC2_C8 & !_LC7_C5
         # !_LC2_C8 &  _LC4_C7 &  _LC7_C5 & !urgen
         #  _LC2_C8 &  urgen;

-- Node name is '|LEDCONTROL:1|~228~1' 
-- Equation name is '_LC4_C5', type is buried 
-- synthesized logic cell