fpga_project2.hif

此RS232通信协议用VHDL语言实现

-1
1
}
# include_file {
d:|altera|quartus51|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
d:|altera|quartus51|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
d:|altera|quartus51|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
d:|altera|quartus51|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
d:|altera|quartus51|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
d:|altera|quartus51|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
d:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
}
# hierarchies {
configurable_u3:U3|lpm_add_sub:i142
configurable_u3:U3|lpm_add_sub:i143
baud:U_baud|lpm_add_sub:i209
baud:U_baud|lpm_add_sub:i210
baud:U_baud|lpm_add_sub:i211
baud:U_baud|lpm_add_sub:i212
baud:U_baud|lpm_add_sub:i213
baud:U_baud|lpm_add_sub:i214
baud:U_baud|lpm_add_sub:i215
baud:U_baud|lpm_add_sub:i216
baud:U_baud|lpm_add_sub:i217
baud:U_baud|lpm_add_sub:i218
baud:U_baud|lpm_add_sub:i219
baud:U_baud|lpm_add_sub:i220
baud:U_baud|lpm_add_sub:i221
baud:U_baud|lpm_add_sub:i222
baud:U_baud|lpm_add_sub:i223
baud:U_baud|lpm_add_sub:i224
baud:U_baud|lpm_add_sub:i225
baud:U_baud|lpm_add_sub:i226
baud:U_baud|lpm_add_sub:i227
baud:U_baud|lpm_add_sub:i228
baud:U_baud|lpm_add_sub:i229
baud:U_baud|lpm_add_sub:i230
baud:U_baud|lpm_add_sub:i231
baud:U_baud|lpm_add_sub:i232
baud:U_baud|lpm_add_sub:i233
baud:U_baud|lpm_add_sub:i234
baud:U_baud|lpm_add_sub:i235
baud:U_baud|lpm_add_sub:i236
baud:U_baud|lpm_add_sub:i237
baud:U_baud|lpm_add_sub:i238
reciever_8_:U_reciever|lpm_add_sub:i690
reciever_8_:U_reciever|lpm_add_sub:i692
reciever_8_:U_reciever|lpm_add_sub:i693
reciever_8_:U_reciever|lpm_add_sub:i694
reciever_8_:U_reciever|lpm_add_sub:i695
reciever_8_:U_reciever|lpm_add_sub:i696
reciever_8_:U_reciever|lpm_add_sub:i697
reciever_8_:U_reciever|lpm_add_sub:i698
reciever_8_:U_reciever|lpm_add_sub:i699
reciever_8_:U_reciever|lpm_add_sub:i700
reciever_8_:U_reciever|lpm_add_sub:i701
reciever_8_:U_reciever|lpm_add_sub:i702
reciever_8_:U_reciever|lpm_add_sub:i703
reciever_8_:U_reciever|lpm_add_sub:i704
reciever_8_:U_reciever|lpm_add_sub:i705
reciever_8_:U_reciever|lpm_add_sub:i706
reciever_8_:U_reciever|lpm_add_sub:i707
reciever_8_:U_reciever|lpm_add_sub:i708
reciever_8_:U_reciever|lpm_add_sub:i709
reciever_8_:U_reciever|lpm_add_sub:i710
reciever_8_:U_reciever|lpm_add_sub:i711
reciever_8_:U_reciever|lpm_add_sub:i712
reciever_8_:U_reciever|lpm_add_sub:i713
reciever_8_:U_reciever|lpm_add_sub:i714
reciever_8_:U_reciever|lpm_add_sub:i715
reciever_8_:U_reciever|lpm_add_sub:i716
reciever_8_:U_reciever|lpm_add_sub:i717
reciever_8_:U_reciever|lpm_add_sub:i718
reciever_8_:U_reciever|lpm_add_sub:i719
reciever_8_:U_reciever|lpm_add_sub:i720
reciever_8_:U_reciever|lpm_add_sub:i721
reciever_8_:U_reciever|lpm_add_sub:i722
transfer_8_:U_transfer|lpm_add_sub:i641
transfer_8_:U_transfer|lpm_add_sub:i642
transfer_8_:U_transfer|lpm_add_sub:i643
transfer_8_:U_transfer|lpm_add_sub:i644
transfer_8_:U_transfer|lpm_add_sub:i645
transfer_8_:U_transfer|lpm_add_sub:i646
transfer_8_:U_transfer|lpm_add_sub:i647
transfer_8_:U_transfer|lpm_add_sub:i648
transfer_8_:U_transfer|lpm_add_sub:i649
transfer_8_:U_transfer|lpm_add_sub:i650
transfer_8_:U_transfer|lpm_add_sub:i651
transfer_8_:U_transfer|lpm_add_sub:i652
transfer_8_:U_transfer|lpm_add_sub:i653
transfer_8_:U_transfer|lpm_add_sub:i654
transfer_8_:U_transfer|lpm_add_sub:i655
transfer_8_:U_transfer|lpm_add_sub:i656
transfer_8_:U_transfer|lpm_add_sub:i657
transfer_8_:U_transfer|lpm_add_sub:i658
transfer_8_:U_transfer|lpm_add_sub:i659
transfer_8_:U_transfer|lpm_add_sub:i660
transfer_8_:U_transfer|lpm_add_sub:i661
transfer_8_:U_transfer|lpm_add_sub:i662
transfer_8_:U_transfer|lpm_add_sub:i663
transfer_8_:U_transfer|lpm_add_sub:i664
transfer_8_:U_transfer|lpm_add_sub:i665
transfer_8_:U_transfer|lpm_add_sub:i666
transfer_8_:U_transfer|lpm_add_sub:i667
transfer_8_:U_transfer|lpm_add_sub:i668
transfer_8_:U_transfer|lpm_add_sub:i669
transfer_8_:U_transfer|lpm_add_sub:i670
transfer_8_:U_transfer|lpm_add_sub:i672
transfer_8_:U_transfer|lpm_add_sub:i673
transfer_8_:U_transfer|lpm_add_sub:i674
}
# end
# entity
addcore
# storage
db|FPGA_Project2.(22).cnf
db|FPGA_Project2.(22).cnf
# case_insensitive
# source_file
d:|altera|quartus51|libraries|megafunctions|addcore.tdf
dacc8d7ac3d13616838bdd54be6656bf
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
1
PARAMETER_UNKNOWN
USR
REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
USR
DIRECTION
ADD
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
}
# used_port {
result0
-1
3
datab0
-1
3
dataa0
-1
3
cout
-1
3
cin
-1
3
}
# include_file {
d:|altera|quartus51|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
d:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
d:|altera|quartus51|libraries|megafunctions|a_csnbuffer.inc
49de46f6a395e2e6edecabe6eac9d873
}
# hierarchies {
configurable_u3:U3|lpm_add_sub:i142|addcore:adder
configurable_u3:U3|lpm_add_sub:i143|addcore:adder
baud:U_baud|lpm_add_sub:i209|addcore:adder
baud:U_baud|lpm_add_sub:i210|addcore:adder
baud:U_baud|lpm_add_sub:i211|addcore:adder
baud:U_baud|lpm_add_sub:i212|addcore:adder
baud:U_baud|lpm_add_sub:i213|addcore:adder
baud:U_baud|lpm_add_sub:i214|addcore:adder
baud:U_baud|lpm_add_sub:i215|addcore:adder
baud:U_baud|lpm_add_sub:i216|addcore:adder
baud:U_baud|lpm_add_sub:i217|addcore:adder
baud:U_baud|lpm_add_sub:i218|addcore:adder
baud:U_baud|lpm_add_sub:i219|addcore:adder
baud:U_baud|lpm_add_sub:i220|addcore:adder
baud:U_baud|lpm_add_sub:i221|addcore:adder
baud:U_baud|lpm_add_sub:i222|addcore:adder
baud:U_baud|lpm_add_sub:i223|addcore:adder
baud:U_baud|lpm_add_sub:i224|addcore:adder
baud:U_baud|lpm_add_sub:i225|addcore:adder
baud:U_baud|lpm_add_sub:i226|addcore:adder
baud:U_baud|lpm_add_sub:i227|addcore:adder
baud:U_baud|lpm_add_sub:i228|addcore:adder
baud:U_baud|lpm_add_sub:i229|addcore:adder
baud:U_baud|lpm_add_sub:i230|addcore:adder
baud:U_baud|lpm_add_sub:i231|addcore:adder
baud:U_baud|lpm_add_sub:i232|addcore:adder
baud:U_baud|lpm_add_sub:i233|addcore:adder
baud:U_baud|lpm_add_sub:i234|addcore:adder
baud:U_baud|lpm_add_sub:i235|addcore:adder
baud:U_baud|lpm_add_sub:i236|addcore:adder
baud:U_baud|lpm_add_sub:i237|addcore:adder
baud:U_baud|lpm_add_sub:i238|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i690|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i692|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i693|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i694|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i695|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i696|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i697|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i698|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i699|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i700|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i701|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i702|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i703|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i704|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i705|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i706|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i707|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i708|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i709|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i710|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i711|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i712|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i713|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i714|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i715|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i716|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i717|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i718|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i719|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i720|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i721|addcore:adder
reciever_8_:U_reciever|lpm_add_sub:i722|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i641|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i642|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i643|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i644|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i645|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i646|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i647|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i648|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i649|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i650|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i651|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i652|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i653|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i654|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i655|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i656|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i657|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i658|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i659|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i660|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i661|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i662|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i663|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i664|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i665|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i666|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i667|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i668|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i669|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i670|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i672|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i673|addcore:adder
transfer_8_:U_transfer|lpm_add_sub:i674|addcore:adder
}
# end
# entity
configurable_u3DIGITAL_IO_DATAREG_INOUT_WR_16_
# storage
db|FPGA_Project2.(23).cnf
db|FPGA_Project2.(23).cnf
# case_insensitive
# source_file
FPGA_Project2.edn
c9e89356cfef4915188dc7757a55f224
8
# hierarchies {
configurable_u3:U3|configurable_u3DIGITAL_IO_DATAREG_INOUT_WR_16_:Re