configurable_u1digital_io_datareg_inout_wr_8__body.blf

此RS232通信协议用VHDL语言实现

.model configurable_u1DIGITAL_IO_DATAREG_INOUT_WR_8_
.inputs Rst
.inputs ResetValue<7>
.inputs ResetValue<6>
.inputs ResetValue<5>
.inputs ResetValue<4>
.inputs ResetValue<3>
.inputs ResetValue<2>
.inputs ResetValue<1>
.inputs ResetValue<0>
.inputs clk
.inputs clken
.inputs enable
.inputs enable_write
.inputs si
.inputs shift
.inputs update
.inputs regin<7>
.inputs regin<6>
.inputs regin<5>
.inputs regin<4>
.inputs regin<3>
.inputs regin<2>
.inputs regin<1>
.inputs regin<0>
.outputs regout<7>
.outputs regout<6>
.outputs regout<5>
.outputs regout<4>
.outputs regout<3>
.outputs regout<2>
.outputs regout<1>
.outputs regout<0>
.outputs so
.loc Configurable_U1.VHD 609 regout<4>
.latch sh_reg<4> regout<4> re clk 6 i137/preset i137/reset n119
.names n80 i137/preset
0 1
.names n82 i137/reset
0 1
.loc Configurable_U1.VHD 609 regout<5>
.latch sh_reg<5> regout<5> re clk 6 i134/preset i134/reset n119
.names n76 i134/preset
0 1
.names n78 i134/reset
0 1
.loc Configurable_U1.VHD 609 regout<6>
.latch sh_reg<6> regout<6> re clk 6 i131/preset i131/reset n119
.names n72 i131/preset
0 1
.names n74 i131/reset
0 1
.names enable clken n116
11 1
.names shift n5
0 1
.names si n5 regin<7> n6
11- 1
-01 1
.names sh_reg<7> n5 regin<6> n7
11- 1
-01 1
.names sh_reg<6> n5 regin<5> n8
11- 1
-01 1
.names sh_reg<5> n5 regin<4> n9
11- 1
-01 1
.names sh_reg<4> n5 regin<3> n10
11- 1
-01 1
.names sh_reg<3> n5 regin<2> n11
11- 1
-01 1
.names sh_reg<2> n5 regin<1> n12
11- 1
-01 1
.names sh_reg<1> n5 regin<0> n13
11- 1
-01 1
.names Rst ResetValue<7> n68
11 1
.loc Configurable_U1.VHD 609 regout<7>
.latch sh_reg<7> regout<7> re clk 6 i128/preset i128/reset n119
.names n68 i128/preset
0 1
.names n70 i128/reset
0 1
.names update enable n33
11 1
.names n33 enable_write n119
11 1
.names Rst ResetValue<6> n72
11 1
.names Rst ResetValue<5> n76
11 1
.names Rst ResetValue<4> n80
11 1
.names Rst ResetValue<3> n84
11 1
.names Rst ResetValue<2> n88
11 1
.names Rst ResetValue<1> n92
11 1
.names Rst ResetValue<0> n96
11 1
.loc Configurable_U1.VHD 609 regout<3>
.latch sh_reg<3> regout<3> re clk 6 i140/preset i140/reset n119
.names n84 i140/preset
0 1
.names n86 i140/reset
0 1
.loc Configurable_U1.VHD 592 sh_reg<7>
.latch n6 sh_reg<7> re clk 2 n116
.loc Configurable_U1.VHD 592 so
.latch n13 so re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<1>
.latch n12 sh_reg<1> re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<2>
.latch n11 sh_reg<2> re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<3>
.latch n10 sh_reg<3> re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<4>
.latch n9 sh_reg<4> re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<5>
.latch n8 sh_reg<5> re clk 2 n116
.loc Configurable_U1.VHD 592 sh_reg<6>
.latch n7 sh_reg<6> re clk 2 n116
.names ResetValue<7> n69
0 1
.names Rst n69 n70
11 1
.names ResetValue<6> n73
0 1
.names Rst n73 n74
11 1
.names ResetValue<5> n77
0 1
.names Rst n77 n78
11 1
.names ResetValue<4> n81
0 1
.names Rst n81 n82
11 1
.names ResetValue<3> n85
0 1
.names Rst n85 n86
11 1
.names ResetValue<2> n89
0 1
.names Rst n89 n90
11 1
.names ResetValue<1> n93
0 1
.names Rst n93 n94
11 1
.names ResetValue<0> n97
0 1
.names Rst n97 n98
11 1
.loc Configurable_U1.VHD 609 regout<2>
.latch sh_reg<2> regout<2> re clk 6 i143/preset i143/reset n119
.names n88 i143/preset
0 1
.names n90 i143/reset
0 1
.loc Configurable_U1.VHD 609 regout<1>
.latch sh_reg<1> regout<1> re clk 6 i146/preset i146/reset n119
.names n92 i146/preset
0 1
.names n94 i146/reset
0 1
.loc Configurable_U1.VHD 609 regout<0>
.latch so regout<0> re clk 6 i149/preset i149/reset n119
.names n96 i149/preset
0 1
.names n98 i149/reset
0 1