configurable_u1digital_io_tapcontroller_body.blf

此RS232通信协议用VHDL语言实现

.model configurable_u1DIGITAL_IO_TAPCONTROLLER
.inputs tck
.inputs tms
.inputs tdi
.inputs drsin
.inputs trst
.outputs tdo
.outputs tdoenable
.outputs reset
.outputs controlen
.outputs updateir
.outputs dataen
.outputs shiftdr
.outputs clockdr
.outputs updatedr
.outputs irout<3>
.outputs irout<2>
.outputs irout<1>
.outputs irout<0>
.outputs tapstate<3>
.outputs tapstate<2>
.outputs tapstate<1>
.outputs tapstate<0>
.inputs id_code_signal<31>
.inputs id_code_signal<30>
.inputs id_code_signal<29>
.inputs id_code_signal<28>
.inputs id_code_signal<27>
.inputs id_code_signal<26>
.inputs id_code_signal<25>
.inputs id_code_signal<24>
.inputs id_code_signal<23>
.inputs id_code_signal<22>
.inputs id_code_signal<21>
.inputs id_code_signal<20>
.inputs id_code_signal<19>
.inputs id_code_signal<18>
.inputs id_code_signal<17>
.inputs id_code_signal<16>
.inputs id_code_signal<15>
.inputs id_code_signal<14>
.inputs id_code_signal<13>
.inputs id_code_signal<12>
.inputs id_code_signal<11>
.inputs id_code_signal<10>
.inputs id_code_signal<9>
.inputs id_code_signal<8>
.inputs id_code_signal<7>
.inputs id_code_signal<6>
.inputs id_code_signal<5>
.inputs id_code_signal<4>
.inputs id_code_signal<3>
.inputs id_code_signal<2>
.inputs id_code_signal<1>
.inputs id_code_signal<0>
.names n1
.names n2
1
.names irout<2> irout<3> reduce_nor_74/n2
1- 1
-1 1
.loc Configurable_U1.VHD 228
.subckt configurable_u1DIGITAL_IO_DRNOOUT_32_ id_reg_unit clk=-id_reg_unit/clk si=-id_reg_unit/si inpvalue<31>=-id_reg_unit/inpvalue<31> inpvalue<30>=-id_reg_unit/inpvalue<30> inpvalue<29>=-id_reg_unit/inpvalue<29> inpvalue<28>=-id_reg_unit/inpvalue<28> inpvalue<27>=-id_reg_unit/inpvalue<27> inpvalue<26>=-id_reg_unit/inpvalue<26> inpvalue<25>=-id_reg_unit/inpvalue<25> inpvalue<24>=-id_reg_unit/inpvalue<24> inpvalue<23>=-id_reg_unit/inpvalue<23> inpvalue<22>=-id_reg_unit/inpvalue<22> inpvalue<21>=-id_reg_unit/inpvalue<21> inpvalue<20>=-id_reg_unit/inpvalue<20> inpvalue<19>=-id_reg_unit/inpvalue<19> inpvalue<18>=-id_reg_unit/inpvalue<18> inpvalue<17>=-id_reg_unit/inpvalue<17> inpvalue<16>=-id_reg_unit/inpvalue<16> inpvalue<15>=-id_reg_unit/inpvalue<15> inpvalue<14>=-id_reg_unit/inpvalue<14> inpvalue<13>=-id_reg_unit/inpvalue<13> inpvalue<12>=-id_reg_unit/inpvalue<12> inpvalue<11>=-id_reg_unit/inpvalue<11> inpvalue<10>=-id_reg_unit/inpvalue<10> inpvalue<9>=-id_reg_unit/inpvalue<9> inpvalue<8>=-id_reg_unit/inpvalue<8> inpvalue<7>=-id_reg_unit/inpvalue<7> inpvalue<6>=-id_reg_unit/inpvalue<6> inpvalue<5>=-id_reg_unit/inpvalue<5> inpvalue<4>=-id_reg_unit/inpvalue<4> inpvalue<3>=-id_reg_unit/inpvalue<3> inpvalue<2>=-id_reg_unit/inpvalue<2> inpvalue<1>=-id_reg_unit/inpvalue<1> inpvalue<0>=-id_reg_unit/inpvalue<0> shiftdr=-id_reg_unit/shiftdr enable=-id_reg_unit/enable so=+idout
.names tck id_reg_unit/clk
1 1
.names tdi id_reg_unit/si
1 1
.names id_code_signal<31> id_reg_unit/inpvalue<31>
1 1
.names id_code_signal<30> id_reg_unit/inpvalue<30>
1 1
.names id_code_signal<29> id_reg_unit/inpvalue<29>
1 1
.names id_code_signal<28> id_reg_unit/inpvalue<28>
1 1
.names id_code_signal<27> id_reg_unit/inpvalue<27>
1 1
.names id_code_signal<26> id_reg_unit/inpvalue<26>
1 1
.names id_code_signal<25> id_reg_unit/inpvalue<25>
1 1
.names id_code_signal<24> id_reg_unit/inpvalue<24>
1 1
.names id_code_signal<23> id_reg_unit/inpvalue<23>
1 1
.names id_code_signal<22> id_reg_unit/inpvalue<22>
1 1
.names id_code_signal<21> id_reg_unit/inpvalue<21>
1 1
.names id_code_signal<20> id_reg_unit/inpvalue<20>
1 1
.names id_code_signal<19> id_reg_unit/inpvalue<19>
1 1
.names id_code_signal<18> id_reg_unit/inpvalue<18>
1 1
.names id_code_signal<17> id_reg_unit/inpvalue<17>
1 1
.names id_code_signal<16> id_reg_unit/inpvalue<16>
1 1
.names id_code_signal<15> id_reg_unit/inpvalue<15>
1 1
.names id_code_signal<14> id_reg_unit/inpvalue<14>
1 1
.names id_code_signal<13> id_reg_unit/inpvalue<13>
1 1
.names id_code_signal<12> id_reg_unit/inpvalue<12>
1 1
.names id_code_signal<11> id_reg_unit/inpvalue<11>
1 1
.names id_code_signal<10> id_reg_unit/inpvalue<10>
1 1
.names id_code_signal<9> id_reg_unit/inpvalue<9>
1 1
.names id_code_signal<8> id_reg_unit/inpvalue<8>
1 1
.names id_code_signal<7> id_reg_unit/inpvalue<7>
1 1
.names id_code_signal<6> id_reg_unit/inpvalue<6>
1 1
.names id_code_signal<5> id_reg_unit/inpvalue<5>
1 1
.names id_code_signal<4> id_reg_unit/inpvalue<4>
1 1
.names id_code_signal<3> id_reg_unit/inpvalue<3>
1 1
.names id_code_signal<2> id_reg_unit/inpvalue<2>
1 1
.names id_code_signal<1> id_reg_unit/inpvalue<1>
1 1
.names id_code_signal<0> id_reg_unit/inpvalue<0>
1 1
.names shiftdr id_reg_unit/shiftdr
1 1
.names idenable id_reg_unit/enable
1 1
.names tapstate<3> tapstate<2> tapstate<1> tapstate<0> Mux_7/muxtemp0
1111 1
1110 1
1011 1
1010 1
1001 1
1000 1
0100 1
.names Mux_7/muxtemp0 n45
1 1
.names tapstate<2> tapstate<1> tapstate<0> Mux_8/muxtemp0
111 1
101 1
100 1
001 1
000 1
.names Mux_8/muxtemp0 n46
1 1
.names tapstate<3> tapstate<2> tapstate<1> tapstate<0> Mux_9/muxtemp0
1111 1
1101 1
1100 1
0101 1
0100 1
.names Mux_9/muxtemp0 n47
1 1
.names tapstate<3> tapstate<2> tapstate<1> tapstate<0> Mux_10/muxtemp0
1111 1
1110 1
1101 1
1100 1
1010 1
1001 1
1000 1
0110 1
0101 1
0100 1
0010 1
0001 1
0000 1
.names Mux_10/muxtemp0 n48
1 1
.names tapstate<3> tapstate<2> tapstate<1> Mux_11/muxtemp0
111 1
110 1
101 1
100 1
010 1
.names Mux_11/muxtemp0 n49
1 1
.names tapstate<2> tapstate<1> tapstate<0> Mux_12/muxtemp0
111 1
101 1
100 1
.names Mux_12/muxtemp0 n50
1 1
.names tapstate<3> tapstate<2> tapstate<1> tapstate<0> Mux_13/muxtemp0
1110 1
1011 1
1010 1
1001 1
1000 1
0111 1
0110 1
0100 1
0011 1
0010 1
0001 1
0000 1
.names Mux_13/muxtemp0 n51
1 1
.names tapstate<2> tapstate<0> Mux_14/muxtemp0
01 1
.names Mux_14/muxtemp0 n52
1 1
.names n45 tms n49 tapstate_nxt<3>
11- 1
-01 1
.names n46 tms n50 tapstate_nxt<2>
11- 1
-01 1
.names n47 tms n51 tapstate_nxt<1>
11- 1
-01 1
.names n48 tms n52 tapstate_nxt<0>
11- 1
-01 1
.loc Configurable_U1.VHD 474 irout<1>
.latch sh_ireg<1> irout<1> re tck 4 i180/reset updateir
.names n139 i180/reset
0 1
.loc Configurable_U1.VHD 474 irout<3>
.latch sh_ireg<3> irout<3> re tck 4 i174/reset updateir
.names n139 i174/reset
0 1
.names n220 n87 reduce_nor_206/n1
1- 1
-1 1
.loc Configurable_U1.VHD 457 irso
.latch n130 irso re tck 2 clockir
.loc Configurable_U1.VHD 393 shiftir_r
.latch shiftir_c shiftir_r re n97 4 i155/reset
.names n96 i155/reset
0 1
.loc Configurable_U1.VHD 534 byp_reg
.latch n158 byp_reg re tck 2 clockdr
.loc Configurable_U1.VHD 474 irout<0>
.latch irso irout<0> re tck 5 i191/reset updateir
.names n139 i191/reset
0 1
.names n223 updatedr
0 1
.names tapstate<0> n66
0 1
.names tapstate<2> n67
0 1
.names n217 reduce_nor_204/n1 reset_c
1- 1
-1 1
.names n87 tapstate<1> n72
11 1
.names n72 n66 clockdr
11 1
.names tapstate<3> tapstate<1> n76
11 1
.loc Configurable_U1.VHD 393 reset_r
.latch reset_c reset_r re n97 4 i154/reset
.names n96 i154/reset
0 1
.names n76 n66 clockir
11 1
.names n87 n86 reduce_nor_204/n1
1- 1
-1 1
.loc Configurable_U1.VHD 457 sh_ireg<3>
.latch n127 sh_ireg<3> re tck 2 clockir
.loc Configurable_U1.VHD 457 sh_ireg<2>
.latch n128 sh_ireg<2> re tck 2 clockir
.loc Configurable_U1.VHD 457 sh_ireg<1>
.latch n129 sh_ireg<1> re tck 2 clockir
.names n219 tapstate<3> shiftdr_c
1- 1
-1 1
.names tapstate<1> n86
0 1
.names tapstate<3> n87
0 1
.names n216 n221 reduce_nor_209/n1
1- 1
-1 1
.names n86 reduce_or_198/n1 n219
1- 1
-1 1
.names shiftir_c shiftdr_c n93
11 1
.names n93 enable_c
0 1
.names trst n96
0 1
.names tck n97
0 1
.loc Configurable_U1.VHD 393 shiftdr
.latch shiftdr_c shiftdr re n97 4 i156/reset
.names n96 i156/reset
0 1
.loc Configurable_U1.VHD 393 tdoenable
.latch enable_c tdoenable re n97 4 i157/reset
.names n96 i157/reset
0 1
.names n111 irout<1> reduce_nor_74/n1
1- 1
-1 1
.names reduce_nor_212/n1 dataen
0 1
.names irout<0> n111
0 1
.names n116 n115 reduce_nor_211/n1
1- 1
-1 1
.names irout<1> n115
0 1
.names irout<2> n116
0 1
.names irout<3> n117
0 1
.names n218 n117 reduce_nor_212/n1
1- 1
-1 1
.names n221 reduce_nor_211/n1 reduce_nor_211/n2
1- 1
-1 1
.names reduce_nor_209/n1 controlen
0 1
.names reduce_nor_74/n3 idenable
0 1
.names n218 irout<3> reset
1- 1
-1 1
.names reduce_nor_74/n1 reduce_nor_74/n2 reduce_nor_74/n3
1- 1
-1 1
.names shiftir_r n126
0 1
.names sh_ireg<3> n126 n128
11 1
.names sh_ireg<2> n126 n129
11 1
.names shiftdr n233
0 1
.names tdi n233 n158
11 1
.names n216 irout<0> n218
1- 1
-1 1
.names n220 tapstate<3> n223
1- 1
-1 1
.names tapstate<0> tapstate<2> reduce_or_198/n1
1- 1
-1 1
.names n219 n87 shiftir_c
1- 1
-1 1
.names tdi n126 n127
11 1
.names reset_r n139
0 1
.names reduce_nor_206/n1 updateir
0 1
.names n217 tapstate<1> n220
1- 1
-1 1
.names n115 irout<2> n216
1- 1
-1 1
.names n117 n111 n221
1- 1
-1 1
.names sh_ireg<1> shiftir_r n130
1- 1
-1 1
.names n67 n66 n217
1- 1
-1 1
.loc Configurable_U1.VHD 308 tapstate<3>
.latch tapstate_nxt<3> tapstate<3> re tck 5 i185/reset
.names n96 i185/reset
0 1
.names irso tapstate<3> drso tdo
11- 1
-01 1
.names idout idenable drsin n155
11- 1
-01 1
.names n155 reduce_nor_211/n2 byp_reg drso
11- 1
-01 1
.loc Configurable_U1.VHD 474 irout<2>
.latch sh_ireg<2> irout<2> re tck 4 i177/reset updateir
.names n139 i177/reset
0 1
.loc Configurable_U1.VHD 308 tapstate<2>
.latch tapstate_nxt<2> tapstate<2> re tck 5 i186/reset
.names n96 i186/reset
0 1
.loc Configurable_U1.VHD 308 tapstate<1>
.latch tapstate_nxt<1> tapstate<1> re tck 5 i187/reset
.names n96 i187/reset
0 1
.loc Configurable_U1.VHD 308 tapstate<0>
.latch tapstate_nxt<0> tapstate<0> re tck 5 i188/reset
.names n96 i188/reset
0 1