fpga_project2_header.blf

来自「此RS232通信协议用VHDL语言实现」· BLF 代码 · 共 39 行

.model FPGA_Project2
.attrib fpga_clock_pin 1 TRUE
.attrib fpga_pinnum 1 152
.inputs CLK_REF
.attrib fpga_pinnum 1 7
.inputs JTAG_NEXUS_TCK
.attrib fpga_pinnum 1 6
.inputs JTAG_NEXUS_TDI
.attrib fpga_pinnum 1 11
.outputs JTAG_NEXUS_TDO
.attrib fpga_pinnum 1 8
.inputs JTAG_NEXUS_TMS
.attrib fpga_pinnum 1 74
.outputs LEDS<7>
.attrib fpga_pinnum 1 75
.outputs LEDS<6>
.attrib fpga_pinnum 1 76
.outputs LEDS<5>
.attrib fpga_pinnum 1 77
.outputs LEDS<4>
.attrib fpga_pinnum 1 78
.outputs LEDS<3>
.attrib fpga_pinnum 1 79
.outputs LEDS<2>
.attrib fpga_pinnum 1 82
.outputs LEDS<1>
.attrib fpga_pinnum 1 83
.outputs LEDS<0>
.attrib fpga_pinnum 1 182
.inputs RS_CTS
.attrib fpga_pinnum 1 184
.outputs RS_RTS
.attrib fpga_pinnum 1 185
.inputs RS_RX
.attrib fpga_pinnum 1 183
.outputs RS_TX
.attrib fpga_pinnum 1 234
.inputs TEST_BUTTON